High-Speed Serial AER on FPGA. - Hans Kristian Otnes Berge; Philipp Häfliger (ISCAS, 2007)

Statistical Simulations for Exploring Defect Tolerance and Power Consumption for 4 Subthreshold 1-Bit Addition Circuits. - Snorre Aunet; Hans Kristian Otnes Berge (IWANN, 2007)

Exploiting Gate Leakage in Deep-Submicrometer CMOS for Input Offset Adaptation. - Philipp Häfliger; Hans Kristian Otnes Berge (IEEE Trans. Circuits Syst. II Express Briefs, 2007)

A Gate Leakage Feedback Element in an Adaptive Amplifier Application. - Hans Kristian Otnes Berge; Philipp Häfliger (IEEE Trans. Circuits Syst. II Express Briefs, 2008)

Statistical Simulations on Perceptron-Based Adders. - Snorre Aunet; Hans Kristian Otnes Berge (Encyclopedia of Artificial Intelligence, 2009)

Design of 9T SRAM for dynamic voltage supplies by a multiobjective optimization approach. - Hans Kristian Otnes Berge; Matthias W. Blesken; Snorre Aunet; Ulrich Rückert 001 (ICECS, 2010)

Muller C-elements based on minority-3 functions for ultra low voltage supplies. - Hans Kristian Otnes Berge; Amir Hasanbegovic; Snorre Aunet (DDECS, 2011)

Multi-objective optimization of minority-3 functions for ultra-low voltage supplies. - Hans Kristian Otnes Berge; Snorre Aunet (ISCAS, 2011)

Yield-oriented energy and performance model for subthreshold circuits with Vth variations. - Hans Kristian Otnes Berge; Snorre Aunet (DDECS, 2013)

A 65 nm 32 b Subthreshold Processor With 9T Multi-Vt SRAM and Adaptive Supply Voltage Control. - Sven Lütkemeier; Thorsten Jungeblut; Hans Kristian Otnes Berge; Snorre Aunet; Mario Porrmann; Ulrich Rückert 001 (IEEE J. Solid State Circuits, 2013)