Ultra-low voltage datapath blocks in 28nm UTBB FD-SOI. - Hans Reyserhove; Nele Reynders; Wim Dehaene (A-SSCC, 2014)

A 16.07pJ/cycle 31MHz fully differential transmission gate logic ARM Cortex M0 core in 40nm CMOS. - Hans Reyserhove; Wim Dehaene (ESSCIRC, 2016)

Design margin elimination in a near-threshold timing error masking-aware 32-bit ARM Cortex M0 in 40nm CMOS. - Hans Reyserhove; Wim Dehaene (ESSCIRC, 2017)

A Differential Transmission Gate Design Flow for Minimum Energy Sub-10-pJ/Cycle ARM Cortex-M0 MCUs. - Hans Reyserhove; Wim Dehaene (IEEE J. Solid State Circuits, 2017)

Margin Elimination Through Timing Error Detection in a Near-Threshold Enabled 32-bit Microcontroller in 40-nm CMOS. - Hans Reyserhove; Wim Dehaene (IEEE J. Solid State Circuits, 2018)

Real-Time Gaze Tracking with Event-Driven Eye Segmentation. - Yu Feng 007; Nathan Goulding-Hotta; Asif Khan; Hans Reyserhove; Yuhao Zhu 001 (VR, 2022)