CMOS RF transmitter with integrated power amplifier utilizing digital equalization. - Dae Hyun Kwon; Hao Li 001; Yuchun Chang; Richard Tseng; Yun Chiu (CICC, 2009)

A Fast Digital Predistortion Algorithm for Radio-Frequency Power Amplifier Linearization With Loop Delay Compensation. - Hao Li 001; Dae Hyun Kwon; Deming Chen; Yun Chiu (IEEE J. Sel. Top. Signal Process., 2009)

Digitally Equalized CMOS Transmitter Front-End With Integrated Power Amplifier. - Dae Hyun Kwon; Hao Li 001; Yuchun Chang; Richard Tseng; Yun Chiu (IEEE J. Solid State Circuits, 2010)

A Four-Channel Beamforming Down-Converter in 90-nm CMOS Utilizing Phase-Oversampling. - Richard Tseng; Hao Li 001; Dae Hyun Kwon; Yun Chiu; Ada S. Y. Poon (IEEE J. Solid State Circuits, 2010)

An Offset Double Conversion Technique for Digital Calibration of Pipelined ADCs. - Bei Peng; Hao Li 001; Pingfen Lin; Yun Chiu (IEEE Trans. Circuits Syst. II Express Briefs, 2010)

A Virtual-ADC Digital Background Calibration Technique for Multistage A/D Conversion. - Bei Peng; Hao Li 001; Seung-Chul Lee; Pingfen Lin; Yun Chiu (IEEE Trans. Circuits Syst. II Express Briefs, 2010)

A 48-mW, 12-bit, 150-MS/s pipelined ADC with digital calibration in 65nm CMOS. - Bei Peng; Guanzhong Huang; Hao Li 001; Peiyuan Wan; Pingfen Lin (CICC, 2011)