Generation of a Precise Binary Logarithm with Difference Grouping Programmable Logic Array. - Hao-Yung Lo; Yoshinao Aoki (IEEE Trans. Computers, 1985)

A Hardwired Generalized Algorithm for Generating the Logarithm Base-k by Iteration. - Hao-Yung Lo; Jau-Ling Chen (IEEE Trans. Computers, 1987)

High-speed signed digital multipiers for VLSI. - Hao-Yung Lo (Microprocessing and Microprogramming, 1990)

An Algorithm for Scaling and Single Residue Error Correction in Residue Number Systems. - Chien-Chun Su; Hao-Yung Lo (IEEE Trans. Computers, 1990)

An Optimal Matched and Parallel Mixed-Radix Converter. - Hao-Yung Lo (J. Inf. Sci. Eng., 1994)

Hybrid ROM Strategy (H-ROM) for Conversion Between Binary Numbers and Logarithms. - Hao-Yung Lo; Hsiu-Feng Lin; Chiang-Shiang Wan (J. Inf. Sci. Eng., 1994)

A New Method of Implementation of VLSI CORDIC for Sine and Cosine Computation. - Hao-Yung Lo; Hsiu-Feng Lin; Kuen-Shiuh Yang (ISCAS, 1995)

Logarithmic Conversion by Four Partitioned Hybrid-ROMs. - Hao-Yung Lo; Hsiu-Feng Lin; Yue-Yuan Ho (ISPAN, 1996)

A Parallel CORDIC Algorithm for Sine and Cosine Generation. - Hao-Yung Lo (PDPTA, 1997)

A Uniform and Squared Direct Two's Complement Multiplier. - Hao-Yung Lo (J. Inf. Sci. Eng., 1997)

Built-in Test with Modified-Booth High-Speed Pipelined Multipliers and Dividers. - Hao-Yung Lo; Hsiu-Feng Lin; Chichyang Chen; Jenshiuh Liu; Chia-Cheng Liu (J. Electron. Test., 2003)