A Sort-Less FPGA-Based Non-Maximum Suppression Accelerator using Multi-Thread Computing and Binary Max Engine for Object Detection. - Chaoming Fang; Habib Derbyshire; Wenyu Sun; Jinshan Yue; Haobing Shi; Yongpan Liu (A-SSCC, 2021)

A Scalable Multi-Chiplet Deep Learning Accelerator with Hub-Side 2.5D Heterogeneous Integration. - Zhanhong Tan; Yifu Wu; Yannian Zhang; Haobing Shi; Wuke Zhang; Kaisheng Ma (HCS, 2023)