True crosstalk aware incremental placement with noise map. - Haoxing Ren; David Zhigang Pan; Paul Villarrubia (ICCAD, 2004)

Diffusion-based placement migration. - Haoxing Ren; David Zhigang Pan; Charles J. Alpert; Paul Villarrubia (DAC, 2005)

Computational geometry based placement migration. - Tao Luo 002; Haoxing Ren; Charles J. Alpert; David Zhigang Pan (ICCAD, 2005)

Sensitivity guided net weighting for placement-driven synthesis. - Haoxing Ren; David Zhigang Pan; David S. Kung 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005)

Hippocrates: First-Do-No-Harm Detailed Placement. - Haoxing Ren; David Z. Pan; Charles J. Alpert; Gi-Joon Nam; Paul G. Villarrubia (ASP-DAC, 2007)

RQL: Global Placement via Relaxed Quadratic Spreading and Linearization. - Natarajan Viswanathan; Gi-Joon Nam; Charles J. Alpert; Paul Villarrubia; Haoxing Ren; Chris C. N. Chu (DAC, 2007)

The nuts and bolts of physical synthesis. - Charles J. Alpert; Shrirang K. Karandikar; Zhuo Li 001; Gi-Joon Nam; Stephen T. Quay; Haoxing Ren; Cliff C. N. Sze; Paul G. Villarrubia; Mehmet Can Yildiz (SLIP, 2007)

Techniques for Fast Physical Synthesis. - Charles J. Alpert; Shrirang K. Karandikar; Zhuo Li 001; Gi-Joon Nam; Stephen T. Quay; Haoxing Ren; Cliff C. N. Sze; Paul G. Villarrubia; Mehmet Can Yildiz (Proc. IEEE, 2007)

Diffusion-Based Placement Migration With Application on Legalization. - Haoxing Ren; David Z. Pan; Charles J. Alpert; Paul G. Villarrubia; Gi-Joon Nam (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007)

Placement-Driven Synthesis Design Closure Tool. - Charles J. Alpert; Nathaniel Hieter; Arjen Mets; Ruchir Puri; Lakshmi N. Reddy; Haoxing Ren; Louise Trevillyan (Handbook of Algorithms for Physical Design Automation, 2008)

Timing-Driven Placement. - David Z. Pan; Bill Halpin; Haoxing Ren (Handbook of Algorithms for Physical Design Automation, 2008)

DeltaSyn: An efficient logic difference optimizer for ECO synthesis. - Smita Krishnaswamy; Haoxing Ren; Nilesh Modi; Ruchir Puri (ICCAD, 2009)

Low cost test point insertion without using extra registers for high performance design. - Haoxing Ren; Mary P. Kusko; Victor N. Kravets; Rona Yaari (ITC, 2009)

History-based VLSI legalization using network flow. - Minsik Cho; Haoxing Ren; Hua Xiang 001; Ruchir Puri (DAC, 2010)

Logical and physical restructuring of fan-in trees. - Hua Xiang 001; Haoxing Ren; Louise Trevillyan; Lakshmi N. Reddy; Ruchir Puri; Minsik Cho (ISPD, 2010)

Design methodology for the IBM POWER7 microprocessor. - Joshua Friedrich; Ruchir Puri; Uwe Brandt; Markus Bühler; Jack DiLullo; Jeremy Hopkins; Mozammel Hossain; Michael A. Kazda; Joachim Keinert; Zahi M. Kurzum; Douglass Lamb; Alice Lee; et al. (IBM J. Res. Dev., 2011)

Intuitive ECO synthesis for high performance circuits. - Haoxing Ren; Ruchir Puri; Lakshmi N. Reddy; Smita Krishnaswamy; Cindy Washburn; Joel Earl; Joachim Keinert (DATE, 2013)

LatchPlanner: latch placement algorithm for datapath-oriented high-performance VLSI designs. - Minsik Cho; Hua Xiang 001; Haoxing Ren; Matthew M. Ziegler; Ruchir Puri (ICCAD, 2013)

Network flow based datapath bit slicing. - Hua Xiang 001; Minsik Cho; Haoxing Ren; Matthew M. Ziegler; Ruchir Puri (ISPD, 2013)

A brief introduction on contemporary High-Level Synthesis. - Haoxing Ren (ICICDT, 2014)

RouteNet: routability prediction for mixed-size designs using convolutional neural network. - Zhiyao Xie; Yu-Hung Huang; Guan-Qi Fang; Haoxing Ren; Shao-Yun Fang; Yiran Chen 001; Nvidia Corporation (ICCAD, 2018)

DREAMPlace: Deep Learning Toolkit-Enabled GPU Acceleration for Modern VLSI Placement. - Yibo Lin; Shounak Dhar; Wuxi Li; Haoxing Ren; Brucek Khailany; David Z. Pan (DAC, 2019)

High Performance Graph Convolutional Networks with Applications in Testability Analysis. - Yuzhe Ma; Haoxing Ren; Brucek Khailany; Harbinder Sikka; Lijuan Luo; Karthikeyan Natarajan; Bei Yu 001 (DAC, 2019)

PRIMAL: Power Inference using Machine Learning. - Yuan Zhou; Haoxing Ren; Yanqing Zhang 002; Ben Keller; Brucek Khailany; Zhiru Zhang (DAC, 2019)

Routability-Driven Macro Placement with Embedded CNN-Based Prediction Model. - Yu-Hung Huang; Zhiyao Xie; Guan-Qi Fang; Tao-Chun Yu; Haoxing Ren; Shao-Yun Fang; Yiran Chen 001; Jiang Hu (DATE, 2019)

Toward Intelligent Physical Design: Deep Learning and GPU Acceleration. - Haoxing Ren (ISPD, 2019)

FIST: A Feature-Importance Sampling and Tree-Based Method for Automatic Design Flow Parameter Tuning. - Zhiyao Xie; Guan-Qi Fang; Yu-Hung Huang; Haoxing Ren; Yanqing Zhang 002; Brucek Khailany; Shao-Yun Fang; Jiang Hu; Yiran Chen 001; Erick Carvajal Barboza (ASP-DAC, 2020)

PowerNet: Transferable Dynamic IR Drop Estimation via Maximum Convolutional Neural Network. - Zhiyao Xie; Haoxing Ren; Brucek Khailany; Ye Sheng; Santosh Santosh; Jiang Hu; Yiran Chen 001 (ASP-DAC, 2020)

ParaGraph: Layout Parasitics and Device Parameter Prediction using Graph Neural Networks. - Haoxing Ren; George F. Kokai; Walker J. Turner; Ting-Sheng Ku (DAC, 2020)

GRANNITE: Graph Neural Network Inference for Transferable Power Estimation. - Yanqing Zhang 002; Haoxing Ren; Brucek Khailany (DAC, 2020)

Opportunities for RTL and Gate Level Simulation using GPUs (Invited Talk). - Yanqing Zhang 002; Haoxing Ren; Brucek Khailany (ICCAD, 2020)

Problem C: GPU Accelerated Logic Re-simulation : (Invited Talk). - Yanqing Zhang 002; Haoxing Ren; Ben Keller; Brucek Khailany (ICCAD, 2020)

ML for CAD - Where is the Treasure Hiding? - Raviv Gal; David Z. Pan; Haoxing Ren; Manish Pandey; Marilyn Wolf; Avi Ziv (MLCAD, 2020)

MAVIREC: ML-Aided Vectored IR-DropEstimation and Classification. - Vidya A. Chhabria; Yanqing Zhang 002; Haoxing Ren; Ben Keller; Brucek Khailany; Sachin S. Sapatnekar (CoRR, 2020)

Accelerating Chip Design With Machine Learning. - Brucek Khailany; Haoxing Ren; Steve Dai; Saad Godil; Ben Keller; Robert Kirby 001; Alicia Klinefelter; Rangharajan Venkatesan; Yanqing Zhang 002; Bryan Catanzaro; William J. Dally (IEEE Micro, 2020)

ABCDPlace: Accelerated Batch-Based Concurrent Detailed Placement on Multithreaded CPUs and GPUs. - Yibo Lin; Wuxi Li; Jiaqi Gu 002; Haoxing Ren; Brucek Khailany; David Z. Pan (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

Standard Cell Routing with Reinforcement Learning and Genetic Algorithm in Advanced Technology Nodes. - Haoxing Ren; Matthew Fojtik (ASP-DAC, 2021)

Invited- NVCell: Standard Cell Layout in Advanced Technology Nodes with Reinforcement Learning. - Haoxing Ren; Matthew Fojtik (DAC, 2021)

MAVIREC: ML-Aided Vectored IR-Drop Estimation and Classification. - Vidya A. Chhabria; Yanqing Zhang 002; Haoxing Ren; Ben Keller; Brucek Khailany; Sachin S. Sapatnekar (DATE, 2021)

Parasitic-Aware Analog Circuit Sizing with Graph Neural Networks and Bayesian Optimization. - Mingjie Liu; Walker J. Turner; George F. Kokai; Brucek Khailany; David Z. Pan; Haoxing Ren (DATE, 2021)

2021 ICCAD CAD Contest Problem C: GPU Accelerated Logic Rewriting. - Ghasem Pasandi; Sreedhar Pratty; David Brown; Yanqing Zhang 002; Haoxing Ren; Brucek Khailany (ICCAD, 2021)

Optimizing VLSI Implementation with Reinforcement Learning - ICCAD Special Session Paper. - Haoxing Ren; Saad Godil; Brucek Khailany; Robert Kirby 001; Haiguang Liao; Siddhartha Nath; Jonathan Raiman; Rajarshi Roy 003 (ICCAD, 2021)

VS-Quant: Per-vector Scaled Quantization for Accurate Low-Precision Neural Network Inference. - Steve Dai; Rangharajan Venkatesan; Haoxing Ren; Brian Zimmer; William J. Dally; Brucek Khailany (CoRR, 2021)

Verifying High-Level Latency-Insensitive Designs with Formal Model Checking. - Steve Dai; Alicia Klinefelter; Haoxing Ren; Rangharajan Venkatesan; Ben Keller; Nathaniel Ross Pinckney; Brucek Khailany (CoRR, 2021)

NVCell: Standard Cell Layout in Advanced Technology Nodes with Reinforcement Learning. - Haoxing Ren; Matthew Fojtik; Brucek Khailany (CoRR, 2021)

DREAMPlace: Deep Learning Toolkit-Enabled GPU Acceleration for Modern VLSI Placement. - Yibo Lin; Zixuan Jiang; Jiaqi Gu 002; Wuxi Li; Shounak Dhar; Haoxing Ren; Brucek Khailany; David Z. Pan (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021)

Generative self-supervised learning for gate sizing: invited. - Siddhartha Nath; Geraldo Pradipta; Corey Hu; Tian Yang; Brucek Khailany; Haoxing Ren (DAC, 2022)

Generic lithography modeling with dual-band optics-inspired neural networks. - Haoyu Yang; Zongyi Li; Kumara Sastry; Saumyadip Mukhopadhyay; Mark Kilgard; Anima Anandkumar; Brucek Khailany; Vivek Singh; Haoxing Ren (DAC, 2022)

GATSPI: GPU accelerated gate-level simulation for power improvement. - Yanqing Zhang 002; Haoxing Ren; Akshay Sridharan; Brucek Khailany (DAC, 2022)

Routability-Aware Placement for Advanced FinFET Mixed-Signal Circuits using Satisfiability Modulo Theories. - Hao Chen 059; Walker J. Turner; David Z. Pan; Haoxing Ren (DATE, 2022)

TAG: Learning Circuit Spatial Embedding from Layouts. - Keren Zhu 001; Hao Chen 059; Walker J. Turner; George F. Kokai; Po-Hsuan Wei; David Z. Pan; Haoxing Ren (ICCAD, 2022)

TransSizer: A Novel Transformer-Based Fast Gate Sizer. - Siddhartha Nath; Geraldo Pradipta; Corey Hu; Tian Yang; Brucek Khailany; Haoxing Ren (ICCAD, 2022)

Why are Graph Neural Networks Effective for EDA Problems?: (Invited Paper). - Haoxing Ren; Siddhartha Nath; Yanqing Zhang 002; Hao Chen 059; Mingjie Liu (ICCAD, 2022)

From RTL to CUDA: A GPU Acceleration Flow for RTL Simulation with Batch Stimulus. - Dian-Lun Lin; Haoxing Ren; Yanqing Zhang 002; Brucek Khailany; Tsung-Wei Huang (ICPP, 2022)

AutoCRAFT: Layout Automation for Custom Circuits in Advanced FinFET Technologies. - Hao Chen 059; Walker J. Turner; Sanquan Song; Keren Zhu 001; George F. Kokai; Brian Zimmer; C. Thomas Gray; Brucek Khailany; David Z. Pan; Haoxing Ren (ISPD, 2022)

Embracing Machine Learning in EDA. - Haoxing Ren (ISPD, 2022)

XT-PRAGGMA: Crosstalk Pessimism Reduction Achieved with GPU Gate-level Simulations and Machine Learning. - Vidya A. Chhabria; Ben Keller; Yanqing Zhang 002; Sandeep Vollala; Sreedhar Pratty; Haoxing Ren; Brucek Khailany (MLCAD, 2022)

Placement Optimization via PPA-Directed Graph Clustering. - Yi-Chen Lu; Tian Yang; Sung Kyu Lim; Haoxing Ren (MLCAD, 2022)

Large Scale Mask Optimization Via Convolutional Fourier Neural Operator and Litho-Guided Self Training. - Haoyu Yang; Zongyi Li; Kumara Sastry; Saumyadip Mukhopadhyay; Anima Anandkumar; Brucek Khailany; Vivek Singh; Haoxing Ren (CoRR, 2022)

An Adversarial Active Sampling-based Data Augmentation Framework for Manufacturable Chip Design. - Mingjie Liu; Haoyu Yang; Zongyi Li; Kumara Sastry; Saumyadip Mukhopadhyay; Selim Dogru; Anima Anandkumar; David Z. Pan; Brucek Khailany; Haoxing Ren (CoRR, 2022)

BufFormer: A Generative ML Framework for Scalable Buffering. - Rongjian Liang; Siddhartha Nath; Anand Rajaram; Jiang Hu; Haoxing Ren (ASP-DAC, 2023)

Enabling Scalable AI Computational Lithography with Physics-Inspired Models. - Haoyu Yang; Haoxing Ren (ASP-DAC, 2023)

GenFuzz: GPU-accelerated Hardware Fuzzing using Genetic Algorithm with Multiple Inputs. - Dian-Lun Lin; Yanqing Zhang 002; Haoxing Ren; Brucek Khailany; Shih-Hsin Wang; Tsung-Wei Huang (DAC, 2023)

Invited Paper: CircuitOps: An ML Infrastructure Enabling Generative AI for VLSI Circuit Optimization. - Rongjian Liang; Anthony Agnesina; Geraldo Pradipta; Vidya A. Chhabria; Haoxing Ren (ICCAD, 2023)

Invited Paper: VerilogEval: Evaluating Large Language Models for Verilog Code Generation. - Mingjie Liu; Nathaniel Ross Pinckney; Brucek Khailany; Haoxing Ren (ICCAD, 2023)

An Adversarial Active Sampling-Based Data Augmentation Framework for AI-Assisted Lithography Modeling. - Mingjie Liu; Haoyu Yang; Brucek Khailany; Haoxing Ren (ICCAD, 2023)

Reinforcement Learning Guided Detailed Routing for Custom Circuits. - Hao Chen 059; Kai-Chieh Hsu; Walker J. Turner; Po-Hsuan Wei; Keren Zhu 001; David Z. Pan; Haoxing Ren (ISPD, 2023)

AutoDMP: Automated DREAMPlace-based Macro Placement. - Anthony Agnesina; Puranjay Rajvanshi; Tian Yang; Geraldo Pradipta; Austin Jiao; Ben Keller; Brucek Khailany; Haoxing Ren (ISPD, 2023)

NVCell 2: Routability-Driven Standard Cell Layout in Advanced Nodes with Lattice Graph Routability Model. - Chia-Tung Ho; Alvin Ho; Matthew Fojtik; Minsoo Kim; Shang Wei; Yaguang Li; Brucek Khailany; Haoxing Ren (ISPD, 2023)

DREAM-GAN: Advancing DREAMPlace towards Commercial-Quality using Generative Adversarial Learning. - Yi-Chen Lu; Haoxing Ren; Hao-Hsiang Hsiao; Sung Kyu Lim (ISPD, 2023)

VerilogEval: Evaluating Large Language Models for Verilog Code Generation. - Mingjie Liu; Nathaniel Ross Pinckney; Brucek Khailany; Haoxing Ren (CoRR, 2023)

ChipNeMo: Domain-Adapted LLMs for Chip Design. - Mingjie Liu; Teodor-Dumitru Ene; Robert Kirby 001; Chris Cheng; Nathaniel Ross Pinckney; Rongjian Liang; Jonah Alben; Himyanshu Anand; Sanmitra Banerjee; Ismet Bayraktaroglu; Bonita Bhaskaran; Bryan Catanzaro; et al. (CoRR, 2023)

RTLFixer: Automatically Fixing RTL Syntax Errors with Large Language Models. - Yun-Da Tsai; Mingjie Liu; Haoxing Ren (CoRR, 2023)

Machine Learning and Algorithms: Let Us Team Up for EDA. - Haoxing Ren; Brucek Khailany; Matthew Fojtik; Yanqing Zhang 002 (IEEE Des. Test, 2023)

Introduction to the Special Issue on Machine Learning for CAD/EDA. - Yibo Lin; Avi Ziv; Haoxing Ren (ACM Trans. Design Autom. Electr. Syst., 2023)

DGR: Differentiable Global Router. - Wei Li 159; Rongjian Liang; Anthony Agnesina; Haoyu Yang; Chia-Tung Ho; Anand Rajaram; Haoxing Ren (DAC, 2024)

RTLFixer: Automatically Fixing RTL Syntax Errors with Large Language Model. - Yunda Tsai; Mingjie Liu; Haoxing Ren (DAC, 2024)

BoolGebra: Attributed Graph-Learning for Boolean Algebraic Manipulation. - Yingjie Li; Anthony Agnesina; Yanqing Zhang 002; Haoxing Ren; Cunxi Yu (DATE, 2024)

GL0AM: GPU Logic Simulation Using 0-Delay and Re-simulation Acceleration Method. - Yanqing Zhang 002; Haoxing Ren; Brucek Khailany (ICCAD, 2024)

Differentiable Edge-based OPC. - Guojin Chen; Haoyu Yang; Haoxing Mark Ren; Bei Yu 001; David Z. Pan (ICCAD, 2024)

2024 ICCAD CAD Contest Problem C: Scalable Logic Gate Sizing Using ML Techniques and GPU Acceleration. - Bing-Yue Wu; Rongjian Liang; Geraldo Pradipta; Anthony Agnesina; Haoxing Ren; Vidya A. Chhabria (ICCAD, 2024)

Invited Paper: LLM4HWDesign Contest: Constructing a Comprehensive Dataset for LLM-Assisted Hardware Code Generation with Community Efforts. - Zhongzhi Yu; Chaojian Li; Yongan Zhang; Mingjie Liu; Nathaniel Ross Pinckney; Wenfei Zhou; Haoyu Yang; Rongjian Liang; Haoxing Ren; Yingyan Celine Lin (ICCAD, 2024)

ILILT: Implicit Learning of Inverse Lithography Technologies. - Haoyu Yang; Haoxing Ren (ICML, 2024)

Novel Transformer Model Based Clustering Method for Standard Cell Design Automation. - Chia-Tung Ho; Ajay Chandna; David Guan; Alvin Ho; Minsoo Kim; Yaguang Li; Haoxing Ren (ISPD, 2024)

GPU/ML-Enhanced Large Scale Global Routing Contest. - Rongjian Liang; Anthony Agnesina; Wen-Hao Liu 001; Haoxing Ren (ISPD, 2024)

MedPart: A Multi-Level Evolutionary Differentiable Hypergraph Partitioner. - Rongjian Liang; Anthony Agnesina; Haoxing Ren (ISPD, 2024)

Challenges for Automating PCB Layout. - Wen-Hao Liu 001; Anthony Agnesina; Haoxing Mark Ren (ISPD, 2024)

Learning to Compare Hardware Designs for High-Level Synthesis. - Yunsheng Bai; Atefeh Sohrabizadeh; Zijian Ding; Rongjian Liang; Weikai Li 002; Ding Wang; Haoxing Ren; Yizhou Sun; Jason Cong (MLCAD, 2024)

PyHDL-Eval: An LLM Evaluation Framework for Hardware Design Using Python-Embedded DSLs. - Christopher Batten; Nathaniel Ross Pinckney; Mingjie Liu; Haoxing Ren; Brucek Khailany (MLCAD, 2024)

ReLS: Retrieval Is Efficient Knowledge Transfer For Logic Synthesis. - Rongjian Liang; Chia-Tung Ho; Anthony Agnesina; Wen-Hao Liu 001; Haoxing Ren (MLCAD, 2024)

Optimizing Predictive AI in Physical Design Flows with Mini Pixel Batch Gradient Descent. - Haoyu Yang; Anthony Agnesina; Haoxing Ren (MLCAD, 2024)

OpenROAD and CircuitOps: Infrastructure for ML EDA Research and Education. - Vidya A. Chhabria; Wenjing Jiang; Andrew B. Kahng; Rongjian Liang; Haoxing Ren; Sachin S. Sapatnekar; Bing-Yue Wu (VTS, 2024)

Domain-Adapted LLMs for VLSI Design and Verification: A Case Study on Formal Verification. - Mingjie Liu; Minwoo Kang; Ghaith Bany Hamad; Syed Suhaib; Haoxing Ren (VTS, 2024)

Assessing Economic Viability: A Comparative Analysis of Total Cost of Ownership for Domain-Adapted Large Language Models versus State-of-the-art Counterparts in Chip Design Coding Assistance. - Amit Sharma; Teodor-Dumitru Ene; Kishor Kunal; Mingjie Liu; Zafar Hasan; Haoxing Ren (CoRR, 2024)

Large Language Model (LLM) for Standard Cell Layout Design Optimization. - Chia-Tung Ho; Haoxing Ren (CoRR, 2024)

Code Less, Align More: Efficient LLM Fine-tuning for Code Generation with Data Pruning. - Yun-Da Tsai; Mingjie Liu; Haoxing Ren (CoRR, 2024)

Revisiting VerilogEval: Newer LLMs, In-Context Learning, and Specification-to-RTL Tasks. - Nathaniel Ross Pinckney; Christopher Batten; Mingjie Liu; Haoxing Ren; Brucek Khailany (CoRR, 2024)

ChipAlign: Instruction Alignment in Large Language Models for Chip Design via Geodesic Interpolation. - Chenhui Deng; Yunsheng Bai; Haoxing Ren (CoRR, 2024)

GAN-Place: Advancing Open Source Placers to Commercial-quality Using Generative Adversarial Networks and Transfer Learning. - Yi-Chen Lu; Haoxing Ren; Hao-Hsiang Hsiao; Sung Kyu Lim (ACM Trans. Design Autom. Electr. Syst., 2024)

DAG-Aware Synthesis Orchestration. - Yingjie Li; Mingju Liu; Haoxing Ren; Alan Mishchenko; Cunxi Yu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

Intelligent OPC Engineer Assistant for Semiconductor Manufacturing. - Guojin Chen; Haoyu Yang; Bei Yu 001; Haoxing Ren (AAAI, 2025)

VerilogCoder: Autonomous Verilog Coding Agents with Graph-based Planning and Abstract Syntax Tree (AST)-based Waveform Tracing Tool. - Chia-Tung Ho; Haoxing Ren; Brucek Khailany (AAAI, 2025)

BOSON-1: Understanding and Enabling Physically-Robust Photonic Inverse Design with Adaptive Variation-Aware Subspace Optimization. - Pingchuan Ma 012; Zhengqi Gao; Amir Begovic; Meng Zhang 023; Haoyu Yang; Haoxing Ren; Z. Rena Huang; Duane S. Boning; Jiaqi Gu 002 (DATE, 2025)

FVEval: Understanding Language Model Capabilities in Formal Verification of Digital Hardware. - Minwoo Kang; Mingjie Liu; Ghaith Bany Hamad; Syed M. Suhaib; Haoxing Ren (DATE, 2025)

ChipVQA: Benchmarking Visual Language Models for Chip Design. - Haoyu Yang; Qijing Huang 001; Nathaniel Ross Pinckney; Walker J. Turner; Wenfei Zhou; Yanqing Zhang 002; Chia-Tung Ho; Chen-Chia Chang; Haoxing Ren (DATE, 2025)

SimPart: A Simple Yet Effective Replication-Aided Partitioning Algorithm for Logic Simulation on GPU. - Yi-Hua Chung; Shui Jiang; Wan-Luan Lee; Yanqing Zhang 002; Haoxing Ren; Tsung-Yi Ho; Tsung-Wei Huang (Euro-Par (3), 2025)

CraftRTL: High-quality Synthetic Data Generation for Verilog Code Models with Correct-by-Construction Non-Textual Representations and Targeted Code Repair. - Mingjie Liu; Yun-Da Tsai; Wenfei Zhou; Haoxing Ren (ICLR, 2025)

GOALPlace: Begin with the End in Mind. - Anthony Agnesina; Rongjian Liang; Geraldo Pradipta; Anand Rajaram; Haoxing Ren (ISPD, 2025)

DRC-Coder: Automated DRC Checker Code Generation Using LLM Autonomous Agent. - Chen-Chia Chang; Chia-Tung Ho; Yaguang Li; Yiran Chen 001; Haoxing Ren (ISPD, 2025)

Invited: ISPD 2025 Performance-Driven Large Scale Global Routing Contest. - Rongjian Liang; Anthony Agnesina; Wen-Hao Liu 001; Matt Liberty; Hsin-Tzu Chang; Haoxing Ren (ISPD, 2025)

LEGO-Size: LLM-Enhanced GPU-Optimized Signoff-Accurate Differentiable VLSI Gate Sizing in Advanced Nodes. - Yi-Chen Lu; Kishor Kunal; Geraldo Pradipta; Rongjian Liang; Ravikishore Gandikota; Haoxing Ren (ISPD, 2025)

GPU-Accelerated Inverse Lithography Towards High Quality Curvy Mask Generation. - Haoyu Yang; Haoxing Ren (ISPD, 2025)

Cypress: VLSI-Inspired PCB Placement with GPU Acceleration. - Niansong Zhang; Anthony Agnesina; Noor Shbat; Yuval Leader; Zhiru Zhang; Haoxing Ren (ISPD, 2025)

AssertionForge: Enhancing Formal Verification Assertion Generation with Structured Representation of Specifications and RTL. - Yunsheng Bai; Ghaith Bany Hamad; Syed Suhaib; Haoxing Ren (CoRR, 2025)

Learning Library Cell Representations in Vector Space. - Rongjian Liang; Yi-Chen Lu; Wen-Hao Liu; Haoxing Ren (CoRR, 2025)

Marco: Configurable Graph-Based Task Solving and Multi-AI Agents Framework for Hardware Design. - Chia-Tung Ho; Jing Gong; Yunsheng Bai; Chenhui Deng; Haoxing Ren; Brucek Khailany (CoRR, 2025)

Timing Analysis Agent: Autonomous Multi-Corner Multi-Mode (MCMM) Timing Debugging with Timing Debug Relation Graph. - Jatin Nainani; Chia-Tung Ho; Anirudh Dhurka; Haoxing Ren (CoRR, 2025)

Automated Routing-Informed Placement for Large-Scale Photonic Integrated Circuits. - Hongjian Zhou; Haoyu Yang; Nicholas Gangi; Haoxing Ren; Z. Rena Huang; Jiaqi Gu 002 (CoRR, 2025)

Deep Physics Prior for First Order Inverse Optimization. - Haoyu Yang; Kamyar Azizzadenesheli; Haoxing Ren (CoRR, 2025)

JARVIS: A Multi-Agent Code Assistant for High-Quality EDA Script Generation. - Ghasem Pasandi; Kishor Kunal; Varun Tej; Kunjal Shan; Hanfei Sun; Sumit Jain; Chunhui Li; Chenhui Deng; Teodor-Dumitru Ene; Haoxing Ren; Sreedhar Pratty (CoRR, 2025)

LiDAR 2.0: Hierarchical Curvy Waveguide Detailed Routing for Large-Scale Photonic Integrated Circuits. - Hongjian Zhou; Haoyu Yang; Ziang Yin; Nicholas Gangi; Zhaoran Huang; Haoxing Ren; Joaquin Matres; Jiaqi Gu 002 (CoRR, 2025)

ScaleRTL: Scaling LLMs with Reasoning Data and Test-Time Compute for Accurate RTL Code Generation. - Chenhui Deng; Yun-Da Tsai; Guan-Ting Liu; Zhongzhi Yu; Haoxing Ren (CoRR, 2025)

HeuriGym: An Agentic Benchmark for LLM-Crafted Heuristics in Combinatorial Optimization. - Hongzheng Chen; Yingheng Wang; Yaohui Cai; Hins Hu; Jiajie Li; Shirley Huang; Chenhui Deng; Rongjian Liang; Shufeng Kong; Haoxing Ren; Samitha Samaranayake; Carla P. Gomes; et al. (CoRR, 2025)

PRO-V: An Efficient Program Generation Multi-Agent System for Automatic RTL Verification. - Yujie Zhao; Zhijing Wu 010; Hejia Zhang; Zhongming Yu; Wentao Ni; Chia-Tung Ho; Haoxing Ren; Jishen Zhao (CoRR, 2025)

Spec2RTL-Agent: Automated Hardware Code Generation from Complex Specifications Using LLM Agent Systems. - Zhongzhi Yu; Mingjie Liu; Michael Zimmer 006; Yingyan Celine Lin; Yong Liu; Haoxing Ren (CoRR, 2025)

Comprehensive Verilog Design Problems: A Next-Generation Benchmark Dataset for Evaluating Large Language Models and Agents on RTL Design and Verification. - Nathaniel Ross Pinckney; Chenhui Deng; Chia-Tung Ho; Yun-Da Tsai; Mingjie Liu; Wenfei Zhou; Brucek Khailany; Haoxing Ren (CoRR, 2025)

Polymath: A Self-Optimizing Agent with Dynamic Hierarchical Workflow. - Chia-Tung Ho; Jing Gong; Xufeng Yao; Yunsheng Bai; Abhishek B. Akkur; Haoxing Ren (CoRR, 2025)