A Fast Congestion-Aware Flow Control Mechanism for ID-Based Networks-on-Chip with Best-Effort Communication. - Haoyuan Ying; Ashok Jaiswal; Thomas Hollstein; Klaus Hofmann (DSD, 2011)

Invited paper: Design criteria for dependable System-on-Chip architectures. - Thomas Hollstein; Faizal Arya Samman; Ashok Jaiswal; Haoyuan Ying; Manfred Glesner; Klaus Hofmann (ReCoSoC, 2011)

A simulation framework for 3-dimension Networks-on-chip with different vertical channel density configurations. - Haoyuan Ying; Ashok Jaiswal; Mohamed A. Abd El-Ghany; Thomas Hollstein; Klaus Hofmann (DDECS, 2012)

GSNOC UI - A comfortable graphical user interface for advanced design and evaluation of 3-dimensional scalable Networks-on-Chip. - Philip Gottschling; Haoyuan Ying; Klaus Hofmann (HPCS, 2012)

Deadlock-free routing algorithms for 3-dimension Networks-on-Chip with reduced vertical channel density topologies. - Haoyuan Ying; Ashok Jaiswal; Klaus Hofmann (HPCS, 2012)

A genetic algorithm based optimization method for low vertical link density 3-dimensional Networks-on-Chip many core systems. - Haoyuan Ying; Kris Heid; Thomas Hollstein; Klaus Hofmann (NORCHIP, 2012)

Communication-centric high level synthesis metrics for low vertical channel density 3-dimensional Networks-on-Chip. - Haoyuan Ying; Thomas Hollstein; Klaus Hofmann (ReCoSoC, 2012)

Fast and optimized task allocation method for low vertical link density 3-dimensional networks-on-chip based many core systems. - Haoyuan Ying; Thomas Hollstein; Klaus Hofmann (DATE, 2013)

GSNoC - The comprehensive design platform for 3-dimensional Networks-on-Chip based many core embedded systems. - Haoyuan Ying; Thomas Hollstein; Klaus Hofmann (HPCS, 2013)

Deadlock-free generic routing algorithms for 3-dimensional Networks-on-Chip with reduced vertical link density topologies. - Haoyuan Ying; Ashok Jaiswal; Thomas Hollstein; Klaus Hofmann (J. Syst. Archit., 2013)

Dynamic quadrant partitioning adaptive routing algorithm for irregular reduced vertical link density topology 3-Dimensional Network-on-Chips. - Haoyuan Ying; Klaus Hofmann; Thomas Hollstein (HPCS, 2014)

LatEst: Latency estimation and high speed evaluation for wormhole switched Networks-on-Chip. - Kris Heid; Haoyuan Ying; Christian Hochberger; Klaus Hofmann (ReCoSoC, 2014)

A hardware/software co-design reconfigurable Network-on-Chip FPGA emulation method. - Haoyuan Ying; Thomas Hollstein; Klaus Hofmann (ReCoSoC, 2014)

NoCDepend: A Flexible and Scalable Dependability Technique for 3D Networks-on-Chip. - Thomas Hollstein; Siavoosh Payandeh Azad; Thilo Kogge; Haoyuan Ying; Klaus Hofmann (DDECS, 2015)

A novel design and verification framework for low vertical link density 3D network-on-chip based many core embedded systems. - Haoyuan Ying (2015)