Concurrent Error Detection in Linear Analog Circuits Using State Estimation. - Haralampos-G. D. Stratigopoulos; Yiorgos Makris (ITC, 2003)

An Analog Checker with Dynamically Adjustable Error Threshold for Fully Differential Circuits. - Haralampos-G. D. Stratigopoulos; Yiorgos Makris (VTS, 2003)

An Analog Checker with Input-Relative Tolerance for Duplicate Signals. - Haralampos-G. D. Stratigopoulos; Yiorgos Makris (J. Electron. Test., 2004)

Generating decision regions in analog measurement spaces. - Haralampos-G. D. Stratigopoulos; Yiorgos Makris (ACM Great Lakes Symposium on VLSI, 2005)

Constructive Derivation of Analog Specification Test Criteria. - Haralampos-G. D. Stratigopoulos; Yiorgos Makris (VTS, 2005)

Nonlinear decision boundaries for testing analog circuits. - Haralampos-G. D. Stratigopoulos; Yiorgos Makris (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005)

Bridging the Accuracy of Functional and Machine-Learning-Based Mixed-Signal Testing. - Haralampos-G. D. Stratigopoulos; Yiorgos Makris (VTS, 2006)

An adaptive checker for the fully differential analog code. - Haralampos-G. D. Stratigopoulos; Yiorgos Makris (IEEE J. Solid State Circuits, 2006)

Concurrent detection of erroneous responses in linear analog circuits. - Haralampos-G. D. Stratigopoulos; Yiorgos Makris (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006)

Non-RF to RF Test Correlation Using Learning Machines: A Case Study. - Haralampos-G. D. Stratigopoulos; Petros Drineas; Mustapha Slamani; Yiorgos Makris (VTS, 2007)

A General Method to Evaluate RF BIST Techniques Based on Non-parametric Density Estimation. - Haralampos-G. D. Stratigopoulos; Jeanne Tongbong; Salvador Mir (DATE, 2008)

A Statistical Approach to Characterizing and Testing Functionalized Nanowires. - James Dardig; Haralampos-G. D. Stratigopoulos; Eric Stern; Mark A. Reed; Yiorgos Makris (VTS, 2008)

Error Moderation in Low-Cost Machine-Learning-Based Analog/RF Testing. - Haralampos-G. D. Stratigopoulos; Yiorgos Makris (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008)

Enrichment of limited training sets in machine-learning-based analog/RF test. - Haralampos-G. D. Stratigopoulos; Salvador Mir; Yiorgos Makris (DATE, 2009)

Defect Filter for Alternate RF Test. - Haralampos-G. D. Stratigopoulos; Salvador Mir; Erkan Acar; Sule Ozev (ETS, 2009)

Hierarchical parametric test metrics estimation: A ΣΔ converter BIST case study. - Matthieu Dubois; Haralampos-G. D. Stratigopoulos; Salvador Mir (ICCD, 2009)

Special Session 7C: TTTC 2009 Best Doctoral Thesis Contest. - Yiorgos Makris; Haralampos-G. D. Stratigopoulos (VTS, 2009)

Evaluation of Analog/RF Test Measurements at the Design Stage. - Haralampos-G. D. Stratigopoulos; Salvador Mir; Ahcène Bounceur (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009)

Bayesian Fault Diagnosis of RF Circuits Using Nonparametric Density Estimation. - Ke Huang 001; Haralampos-G. D. Stratigopoulos; Salvador Mir (Asian Test Symposium, 2010)

Fault diagnosis of analog circuits based on machine learning. - Ke Huang 001; Haralampos-G. D. Stratigopoulos; Salvador Mir (DATE, 2010)

Sensors for built-in alternate RF test. - Louay Abdallah; Haralampos-G. D. Stratigopoulos; Christophe Kelma; Salvador Mir (ETS, 2010)

Analog test metrics estimates with PPM accuracy. - Haralampos-G. D. Stratigopoulos; Salvador Mir (ICCAD, 2010)

An analog VLSI multilayer perceptron and its application towards built-in self-test in analog circuits. - Dzmitry Maliuk; Haralampos-G. D. Stratigopoulos; Yiorgos Makris (IOLTS, 2010)

Analog neural network design for RF built-in self-test. - Dzmitry Maliuk; Haralampos-G. D. Stratigopoulos; He Huang; Yiorgos Makris (ITC, 2010)

Density estimation for analog/RF test problem solving. - Salvador Mir; Haralampos-G. D. Stratigopoulos; Ahcène Bounceur (VTS, 2010)

Special session 4C: Thesis research poster session. - Haralampos-G. D. Stratigopoulos (VTS, 2010)

Special session 8A: TTTC 2010 E. J. McCluskey Best Doctoral Thesis Award. - Haralampos-G. D. Stratigopoulos (VTS, 2010)

Special session 12A: Panel adaptive analog test: Feasibility and opportunities ahead. - Haralampos-G. D. Stratigopoulos (VTS, 2010)

RF Specification Test Compaction Using Learning Machines. - Haralampos-G. D. Stratigopoulos; Petros Drineas; Mustapha Slamani; Yiorgos Makris (IEEE Trans. Very Large Scale Integr. Syst., 2010)

On Replacing an RF Test with an Alternative Measurement: Theory and a Case Study. - Alexios Spyronasios; Louay Abdallah; Haralampos-G. D. Stratigopoulos; Salvador Mir (Asian Test Symposium, 2011)

Implicit test of high-speed analog circuits using non-intrusive sensors. - Louay Abdallah; Haralampos-G. D. Stratigopoulos; Salvador Mir (ECCTD, 2011)

On proving the efficiency of alternative RF tests. - Nathan Kupp; Haralampos-G. D. Stratigopoulos; Petros Drineas; Yiorgos Makris (ICCAD, 2011)

RF Front-End Test Using Built-in Sensors. - Louay Abdallah; Haralampos-G. D. Stratigopoulos; Salvador Mir; Christophe Kelma (IEEE Des. Test Comput., 2011)

Guest Editorial. - Haralampos-G. D. Stratigopoulos; Krishnendu Chakrabarty (J. Electron. Test., 2011)

Estimation of Analog Parametric Test Metrics Using Copulas. - Ahcène Bounceur; Salvador Mir; Haralampos-G. D. Stratigopoulos (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011)

Testing RF circuits with true non-intrusive built-in sensors. - Louay Abdallah; Haralampos-G. D. Stratigopoulos; Salvador Mir; Josep Altet (DATE, 2012)

Advances in variation-aware modeling, verification, and testing of analog ICs. - Dimitri de Jonghe; Elie Maricau; Georges G. E. Gielen; Trent McConaghy; Bratislav Tasic; Haralampos-G. D. Stratigopoulos (DATE, 2012)

Enhanced reduced code linearity test technique for multi-bit/stage pipeline ADCs. - Asma Laraba; Haralampos-G. D. Stratigopoulos; Salvador Mir; Hervé Naudet; Christophe Forel (ETS, 2012)

Experiences with non-intrusive sensors for RF built-in test. - Louay Abdallah; Haralampos-G. D. Stratigopoulos; Salvador Mir; Christophe Kelma (ITC, 2012)

Adaptive Alternate Analog Test. - Haralampos-G. D. Stratigopoulos; Salvador Mir (IEEE Des. Test Comput., 2012)

Guest Editors' Introduction: Digitally Enhanced Wireless Transceivers. - Haralampos-G. D. Stratigopoulos; Alberto Valdes-Garcia (IEEE Des. Test Comput., 2012)

Test Metrics Model for Analog Test Development. - Haralampos-G. D. Stratigopoulos (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012)

Diagnosis of Local Spot Defects in Analog Circuits. - Ke Huang 001; Haralampos-G. D. Stratigopoulos; Salvador Mir; Camelia Hora; Yizi Xing; Bram Kruseman (IEEE Trans. Instrum. Meas., 2012)

Multidimensional analog test metrics estimation using extreme value theory and statistical blockade. - Haralampos-G. D. Stratigopoulos; Pierre Faubet; Yoann Courant; Firas Mohamed (DAC, 2013)

Multivariate statistical techniques for analog parametric test metrics estimation. - Ke Huang 001; Haralampos-G. D. Stratigopoulos; Louay Abdallah; Salvador Mir; Ahcène Bounceur (DTIS, 2013)

True non-intrusive sensors for RF built-in test. - Louay Abdallah; Haralampos-G. D. Stratigopoulos; Salvador Mir (ITC, 2013)

Fault modeling and diagnosis for nanometric analog circuits. - Ke Huang 001; Haralampos-G. D. Stratigopoulos; Salvador Mir (ITC, 2013)

Defect-oriented non-intrusive RF test using on-chip temperature sensors. - Louay Abdallah; Haralampos-G. D. Stratigopoulos; Salvador Mir; Josep Altet (VTS, 2013)

Reduced code linearity testing of pipeline adcs in the presence of noise. - Asma Laraba; Haralampos-G. D. Stratigopoulos; Salvador Mir; Hervé Naudet; Gerard Bret (VTS, 2013)

Reduced-Code Linearity Testing of Pipeline ADCs. - Asma Laraba; Haralampos-G. D. Stratigopoulos; Salvador Mir; Hervé Naudet; Gerard Bret (IEEE Des. Test, 2013)

One-Shot Calibration of RF Circuits Based on Non-Intrusive Sensors. - Martin Andraud; Haralampos-G. D. Stratigopoulos; Emmanuel Simeu (DAC, 2014)

Low-cost EVM built-in test of RF transceivers. - Ayssar Serhan; Louay Abdallah; Haralampos-G. D. Stratigopoulos; Salvador Mir (IDT, 2014)

Solutions for the self-adaptation of communicating systems in operation. - Martin Andraud; Anthony Deluthault; Mouhamadou Dieng; Florence Azaïs; Serge Bernard; Philippe Cauvet; Mariane Comte; Thibault Kervaon; Vincent Kerzerho; Salvador Mir; Paul-Henri Pugliesi-Conti; Michel Renovell; et al. (IOLTS, 2014)

Review of temperature sensors as monitors for RF-MMW built-in testing and self-calibration schemes. - Josep Altet; Eduardo Aldrete-Vidrio; Ferran Reverter; Didac Gómez; José Luis González 001; Marvin Onabajo; José Silva-Martínez; B. Martineau; X. Perpiñà; Louay Abdallah; Haralampos-G. D. Stratigopoulos; Xavier Aragonès; et al. (MWSCAS, 2014)

Evaluation of digital ternary stimuli for dynamic test of ΣΔ ADCs. - Matthieu Dubois; Haralampos-G. D. Stratigopoulos; Salvador Mir; Manuel J. Barragán (VLSI-SoC, 2014)

Statistical Evaluation of Digital Techniques for $ sum varDelta$ ADC BIST. - Matthieu Dubois; Haralampos-G. D. Stratigopoulos; Salvador Mir; Manuel J. Barragán (VLSI-SoC (Selected Papers), 2014)

Efficient Monte Carlo-based analog parametric fault modelling. - Haralampos-G. D. Stratigopoulos; Stephen Sunter (VTS, 2014)

Fast Monte Carlo-Based Estimation of Analog Parametric Test Metrics. - Haralampos-G. D. Stratigopoulos; Stephen Sunter (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014)

Fast deployment of alternate analog test using Bayesian model fusion. - John Liaperdos; Haralampos-G. D. Stratigopoulos; Louay Abdallah; Yiorgos Tsiatouhas; Angela Arapoyanni; Xin Li (DATE, 2015)

High frequency jitter estimator for SoCs. - Hervé Le Gall; Rshdee Alhakim; Miroslav Valka; Salvador Mir; Haralampos-G. D. Stratigopoulos; Emmanuel Simeu (ETS, 2015)

Yield Forecasting in Fab-to-Fab Production Migration Based on Bayesian Model Fusion. - Ali Ahmadi; Haralampos-G. D. Stratigopoulos; Amit Nahar; Bob Orr; Michael Pas; Yiorgos Makris (ICCAD, 2015)

Test and Calibration of RF Circuits Using Built-in Non-intrusive Sensors. - Athanasios Dimakos; Martin Andraud; Louay Abdallah; Haralampos-G. D. Stratigopoulos; Emmanuel Simeu; Salvador Mir (ISVLSI, 2015)

Evaluation of low-cost mixed-signal test techniques for circuits with long simulation times. - Haralampos-G. D. Stratigopoulos; Manuel J. Barragán; Salvador Mir; Hervé Le Gall; Neha Bhargava; Ankur Bal (ITC, 2015)

Parametric Built-In Test for 65nm RF LNA Using Non-Intrusive Variation-Aware Sensors. - Athanasios Dimakos; Haralampos-G. D. Stratigopoulos; Alexandre Siligaris; Salvador Mir; Emeric de Foucauld (J. Electron. Test., 2015)

Exploiting Pipeline ADC Properties for a Reduced-Code Linearity Test Technique. - Asma Laraba; Haralampos-G. D. Stratigopoulos; Salvador Mir; Hervé Naudet (IEEE Trans. Circuits Syst. I Regul. Pap., 2015)

Built-in test of millimeter-Wave circuits based on non-intrusive sensors. - Athanasios Dimakos; Haralampos-G. D. Stratigopoulos; Alexandre Siligaris; Salvador Mir; Emeric de Foucauld (DATE, 2016)

ETS 2016 foreword. - Said Hamdioui; Giorgio Di Natale; Bram Kruseman; Maria K. Michael; Haralampos-G. D. Stratigopoulos (ETS, 2016)

Harnessing fabrication process signature for predicting yield across designs. - Ali Ahmadi; Haralampos-G. D. Stratigopoulos; Amit Nahar; Bob Orr; Michael Pas; Yiorgos Makris (ISCAS, 2016)

Practical Simulation Flow for Evaluating Analog/Mixed-Signal Test Techniques. - Manuel J. Barragán; Haralampos-G. D. Stratigopoulos; Salvador Mir; Hervé Le Gall; Neha Bhargava; Ankur Bal (IEEE Des. Test, 2016)

Guest Editors' Introduction: Top Papers from the 2015 International Test Conference. - Nicola Nicolici; Haralampos-G. D. Stratigopoulos (IEEE Des. Test, 2016)

A 65nm CMOS Ramp Generator Design and its Application Towards a BIST Implementation of the Reduced-Code Static Linearity Test Technique for Pipeline ADCs. - Guillaume Renaud; Manuel J. Barragán; Asma Laraba; Haralampos-G. D. Stratigopoulos; Salvador Mir; Hervé Le Gall; Hervé Naudet (J. Electron. Test., 2016)

One-Shot Non-Intrusive Calibration Against Process Variations for Analog/RF Circuits. - Martin Andraud; Haralampos-G. D. Stratigopoulos; Emmanuel Simeu (IEEE Trans. Circuits Syst. I Regul. Pap., 2016)

A Fully-Digital BIST Wrapper Based on Ternary Test Stimuli for the Dynamic Test of a 40 nm CMOS 18-bit Stereo Audio ΣΔ ADC. - Manuel J. Barragán; Rshdee Alhakim; Haralampos-G. D. Stratigopoulos; Matthieu Dubois; Salvador Mir; Hervé Le Gall; Neha Bhargava; Ankur Bal (IEEE Trans. Circuits Syst. I Regul. Pap., 2016)

Foreword. - Maria K. Michael; Rolf Drechsler; Stephan Eggersglüß; Haralampos-G. D. Stratigopoulos; Sybille Hellebrand; Rob Aitken (ETS, 2017)

Adaptive test flow for mixed-signal ICs. - Haralampos-G. D. Stratigopoulos; Christian Streitwieser (VTS, 2017)

Recap of the European Test Symposium 2017 (ETS'17). - Maria K. Michael; Haralampos-G. D. Stratigopoulos (IEEE Des. Test, 2017)

Yield Forecasting Across Semiconductor Fabrication Plants and Design Generations. - Ali Ahmadi; Haralampos-G. D. Stratigopoulos; Ke Huang 001; Amit Nahar; Bob Orr; Michael Pas; John M. Carulli; Yiorgos Makris (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017)

Machine learning applications in IC testing. - Haralampos-G. D. Stratigopoulos (ETS, 2018)

Open Source Hardware and EDA Tools for Analog/Mixed-Signal Design and Prototyping. - Naohiko Shimizu; Junichi Akita; Marie-Minerve Louërat; Haralampos-G. D. Stratigopoulos; Jean-Paul Chaput; Dimitri Galayko (ISCAS, 2018)

Special session on machine learning: How will machine learning transform test? - Yiorgos Makris; Amit Nahar; Haralampos-G. D. Stratigopoulos; Marc Hutner (VTS, 2018)

Adaptive Test With Test Escape Estimation for Mixed-Signal ICs. - Haralampos-G. D. Stratigopoulos; Christian Streitwieser (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

MixLock: Securing Mixed-Signal Circuits via Logic Locking. - Julian Leonhard; Muhammad Yasin; Shadi Turk; Mohammed Thari Nabeel; Marie-Minerve Louërat; Roselyne Chotin-Avot; Hassan Aboushady; Ozgur Sinanoglu; Haralampos-G. D. Stratigopoulos (DATE, 2019)

Self-Testing Analog Spiking Neuron Circuit. - Sarah A. El-Sayed; Luis A. Camuñas-Mesa; Bernabé Linares-Barranco; Haralampos-G. D. Stratigopoulos (SMACD, 2019)

Mixed-Signal Hardware Security Using MixLock: Demonstration in an Audio Application. - Julian Leonhard; Marie-Minerve Louërat; Hassan Aboushady; Ozgur Sinanoglu; Haralampos-G. D. Stratigopoulos (SMACD, 2019)

IP Session on Machine Learning Applications in IC Test-Related Tasks. - Ghada Sokar; Yassin Zakaria; Asmaa Rabie; Kareem Madkour; Ira Leventhal; Jochen Rivoir; Xinli Gu; Haralampos-G. D. Stratigopoulos (VTS, 2019)

Securing Programmable Analog ICs Against Piracy. - Mohamed Elshamy; Alhassan Sayed; Marie-Minerve Louërat; Amine Rhouni; Hassan Aboushady; Haralampos-G. D. Stratigopoulos (DATE, 2020)

Symmetry-based A/M-S BIST (SymBIST): Demonstration on a SAR ADC IP. - Antonios Pavlidis; Marie-Minerve Louërat; Eric Faehn; Anand Kumar; Haralampos-G. D. Stratigopoulos (DATE, 2020)

Hardware Trojan Attacks in Analog/Mixed-Signal ICs via the Test Access Mechanism. - Mohamed Elshamy; Giorgio Di Natale; Antonios Pavlidis; Marie-Minerve Louërat; Haralampos-G. D. Stratigopoulos (ETS, 2020)

Spiking Neuron Hardware-Level Fault Modeling. - Sarah A. El-Sayed; Theofilos Spyrou; Antonios Pavlidis; Engin Afacan; Luis A. Camuñas-Mesa; Bernabé Linares-Barranco; Haralampos-G. D. Stratigopoulos (IOLTS, 2020)

Breaking Analog Biasing Locking Techniques via Re-Synthesis. - Julian Leonhard; Mohamed Elshamy; Marie-Minerve Louërat; Haralampos-G. D. Stratigopoulos (ASP-DAC, 2021)

Neuron Fault Tolerance in Spiking Neural Networks. - Theofilos Spyrou; Sarah A. El-Sayed; Engin Afacan; Luis A. Camuñas-Mesa; Bernabé Linares-Barranco; Haralampos-G. Stratigopoulos (DATE, 2021)

BIST-Assisted Analog Fault Diagnosis. - Antonios Pavlidis; Eric Faehn; Marie-Minerve Louërat; Haralampos-G. Stratigopoulos (ETS, 2021)

Neuron-PUF: Physical Unclonable Function Based on a Single Spiking Neuron. - Mohamed Elshamy; Haralampos-G. Stratigopoulos (IOLTS, 2021)

Analog and Mixed-Signal IC Security via Sizing Camouflaging. - Julian Leonhard; Alhassan Sayed; Marie-Minerve Louërat; Hassan Aboushady; Haralampos-G. D. Stratigopoulos (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021)

SymBIST: Symmetry-Based Analog and Mixed-Signal Built-In Self-Test for Functional Safety. - Antonios Pavlidis; Marie-Minerve Louërat; Eric Faehn; Anand Kumar; Haralampos-G. Stratigopoulos (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

Locking by Untuning: A Lock-Less Approach for Analog and Mixed-Signal IC Security. - Mohamed Elshamy; Alhassan Sayed; Marie-Minerve Louërat; Hassan Aboushady; Haralampos-G. Stratigopoulos (IEEE Trans. Very Large Scale Integr. Syst., 2021)

Anti-Piracy of Analog and Mixed-Signal Circuits in FD-SOI. - Mariam Tlili; Alhassan Sayed; Doaa Mahmoud; Marie-Minerve Louërat; Hassan Aboushady; Haralampos-G. Stratigopoulos (ASP-DAC, 2022)

SyncLock: RF Transceiver Security Using Synchronization Locking. - Alán Rodrigo Díaz Rizo; Hassan Aboushady; Haralampos-G. Stratigopoulos (DATE, 2022)

Reliability Analysis of a Spiking Neural Network Hardware Accelerator. - Theofilos Spyrou; Sarah A. El-Sayed; Engin Afacan; Luis A. Camuñas-Mesa; Bernabé Linares-Barranco; Haralampos-G. Stratigopoulos (DATE, 2022)

Circuit-to-Circuit Attacks in SoCs via Trojan-Infected IEEE 1687 Test Infrastructure. - Michele Portolan; Antonios Pavlidis; Giorgio Di Natale; Eric Faehn; Haralampos-G. Stratigopoulos (ITC, 2022)

Run-Time Hardware Trojan Detection in Analog and Mixed-Signal ICs. - Antonios Pavlidis; Eric Faehn; Marie-Minerve Louërat; Haralampos-G. Stratigopoulos (VTS, 2022)

Digitally Assisted Mixed-Signal Circuit Security. - Julian Leonhard; Nimisha Limaye; Shadi Turk; Alhassan Sayed; Alán Rodrigo Díaz Rizo; Hassan Aboushady; Ozgur Sinanoglu; Haralampos-G. Stratigopoulos (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

Digital-to-Analog Hardware Trojan Attacks. - Mohamed Elshamy; Giorgio Di Natale; Alhassan Sayed; Antonios Pavlidis; Marie-Minerve Louërat; Hassan Aboushady; Haralampos-G. Stratigopoulos (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

RF Transceiver Security Against Piracy Attacks. - Alán Rodrigo Díaz Rizo; Julian Leonhard; Hassan Aboushady; Haralampos-G. Stratigopoulos (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

Testing and Reliability of Spiking Neural Networks: A Review of the State-of-the-Art. - Haralampos-G. Stratigopoulos; Theofilos Spyrou; Spyridon Raptis (DFT, 2023)

On-Line Testing of Neuromorphic Hardware. - Theofilos Spyrou; Haralampos-G. Stratigopoulos (ETS, 2023)

Leaking Wireless ICs via Hardware Trojan-Infected Synchronization. - Alán Rodrigo Díaz Rizo; Hassan Aboushady; Haralampos-G. Stratigopoulos (IEEE Trans. Dependable Secur. Comput., 2023)

Anti-Piracy Design of RF Transceivers. - Alán Rodrigo Díaz Rizo; Hassan Aboushady; Haralampos-G. Stratigopoulos (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

Special Issue on Testability and Dependability of Artificial Intelligence Hardware. - Fei Su; Chunsheng Liu; Haralampos-G. Stratigopoulos (IEEE Des. Test, 2023)

Testability and Dependability of AI Hardware: Survey, Trends, Challenges, and Perspectives. - Fei Su; Chunsheng Liu; Haralampos-G. Stratigopoulos (IEEE Des. Test, 2023)

Compact Functional Testing for Neuromorphic Computing Circuits. - Sarah A. El-Sayed; Theofilos Spyrou; Luis A. Camuñas-Mesa; Haralampos-G. Stratigopoulos (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

Trusted SMEs for Sustainable Growth of Europeans Economical Backbone to Strengthen the Digital Sovereignty: The KDT Resilient Trust Project. - Hassan Aboushady; Noemie Beringuier-Boher; Kelly Burke; Philippe Dallemagne; Mario De Biase; Manuel Di Frangia; Virginie Deniau; Enrico Ferrari; Christophe Gaquière; Dominique Morche; Fabio Patrone; Stefano Pesci; et al. (DSD, 2024)

Covert Communication Channels Based On Hardware Trojans: Open-Source Dataset and AI-Based Detection. - Alán Rodrigo Díaz Rizo; Abdelrahman Emad Abdelazim; Hassan Aboushady; Haralampos-G. Stratigopoulos (HOST, 2024)

A 10.8GS/s, 84MHz-BW RF Bandpass ΣΔ ADC with a 89dB-SFDR and a 62dB-SNDR for LTE/5G Receivers. - A. Sayed; Michel Vasilevski; M. T. Abdelmomen; Shadi Turk; Ahmed A. Ghoniem; C. Perez; C. Voillequin; Haralampos-G. Stratigopoulos; Marie-Minerve Louërat; E. Wantiez; Hassan Aboushady (VLSI Technology and Circuits, 2024)

On the Sensitivity of Analog Artificial Neural Network Models to Process Variation. - N. Afroz; A. Sayem; Georgios Volanis; Dzmitry Maliuk; Haralampos-G. Stratigopoulos; Yiorgos Makris (VTS, 2024)

SpikeFI: A Fault Injection Framework for Spiking Neural Networks. - Theofilos Spyrou; Said Hamdioui; Haralampos-G. Stratigopoulos (CoRR, 2024)

An End-To-End Neuromorphic Radio Classification System With an Efficient Sigma-Delta-Based Spike Encoding Scheme. - Wenzhe Guo; Kuilian Yang; Haralampos-G. Stratigopoulos; Hassan Aboushady; Khaled Nabil Salama (IEEE Trans. Artif. Intell., 2024)

Analog Circuit Anti-Piracy Security by Exploiting Device Ratings. - Hazem H. Hammam; Hassan Aboushady; Haralampos-G. Stratigopoulos (DATE, 2025)

Minimum Time Maximum Fault Coverage Testing of Spiking Neural Networks. - Spyridon Raptis; Haralampos-G. Stratigopoulos (DATE, 2025)

European Test Symposium Teams: an Anniversary Snapshot. - Maksim Jenihhin; Jaan Raik; Artur Jutman; Natalia Cherezova; Raimund Ubar; Liviu Miclea; Szilárd Enyedi; I. Stefan; Ovidiu Stan; Cosmina Corches; Z. Peng; Petru Eles; et al. (ETS, 2025)

On the Fault Sensitivity of Natural Language Embeddings Computation. - Sumeet Sapkal; Ussama Zahid; Giulio Gambardella; Haralampos-G. Stratigopoulos; Brian Clerkin (ETS, 2025)

On the Trustworthiness of Spiking Neural Networks and Neuromorphic Systems. - Theofilos Spyrou; Haralampos-G. Stratigopoulos; Ihsen Alouani; Said Hamdioui; Anteneh Gebregiorgis (ETS, 2025)

Input-Triggered Hardware Trojan Attack on Spiking Neural Networks. - Spyridon Raptis; Paul Kling; Ioannis Kaskampas; Ihsen Alouani; Haralampos-G. Stratigopoulos (HOST, 2025)

STDP-Trained Spiking Neural Network Reliability Assessment Through Fault Injections. - Zalfa Jouni; Haralampos-G. Stratigopoulos (IOLTS, 2025)

Anti-Counterfeiting Secured Design of a Bandgap Reference Circuit. - Hazem H. Hammam; Hassan Aboushady; Haralampos-G. Stratigopoulos (ISCAS, 2025)

Live Demonstration: Securing Wireless ICs Against Supply Chain Attacks Using SyncLock. - Alán Rodrigo Díaz Rizo; Hassan Aboushady; Haralampos-G. Stratigopoulos (ISCAS, 2025)

A Power-Efficient Attention-Infused CNN Hardware Accelerator for RF Spectrum Monitoring. - Zhifan Song; Abdelrahman Emad Abdelazim; Pirouz Bazargan-Sabet; Franck Wajsbürt; Haralampos-G. Stratigopoulos; Hassan Aboushady (ISCAS, 2025)

Input-Specific and Universal Adversarial Attack Generation for Spiking Neural Networks in the Spiking Domain. - Spyridon Raptis; Haralampos-G. Stratigopoulos (CoRR, 2025)

Special Issue on the First IEEE Top Picks in VLSI Test and Reliability Workshop. - Jyotika Athavale; Haralampos-G. Stratigopoulos (IEEE Des. Test, 2025)