Functional verification of a frequency-programmable switch chip with asynchronous clock sections. - Bodo Hoppe; Bridgette Arthur-Mensah; Edward W. Chencinski; Sabina Joseph; Haresh Kumar; Jose F. Silverio (IBM J. Res. Dev., 2004)

DSDV, DYMO, OLSR: Link Duration and Path Stability. - Sanjay Kumar; Nadeem Javaid; Zahid Yousuf; Haresh Kumar; Zahoor Ali Khan; Ayesha Bibi (TrustCom, 2012)

On Link Availability Probability of Routing Protocols for Urban Scenario in VANETs - Sanjay Kumar; Nadeem Javaid; Zahid Yousuf; Haresh Kumar; Zahoor Ali Khan; Umar Qasim (CoRR, 2012)

Distributed process monitoring and control using FPGA. - Syed Waqad Ali Hashmi; Muhammad Rehan 002; Muhammad Aamir 001; Haresh Kumar; Faraz Liaquat (VITAE, 2014)

Classification of PD Faults Using Features Extraction and K-Means Clustering Techniques. - Haresh Kumar; Muhammad Shafiq 004; Ghulam Amjad Hussain; Lauri Kumpulainen; Kimmo Kauhaniemi (ISGT-Europe, 2020)

Comparison of Machine Learning Algorithms for Classification of Partial Discharge Signals in Medium Voltage Components. - Haresh Kumar; Muhammad Shafiq 004; Ghulam Amjad Hussain; Kimmo Kauhaniemi (ISGT-Europe, 2021)