A numerical study of variable coefficient elliptic Cauchy problem via projection method. - Hari Shanker Gupta (Int. J. Comput. Math., 2012)

A fully discrete C0 interior penalty Galerkin approximation of the extended Fisher-Kolmogorov equation. - Thirupathi Gudi; Hari Shanker Gupta (J. Comput. Appl. Math., 2013)

Analysis of an Interior Penalty Method for Fourth Order Problems on Polygonal Domains. - Thirupathi Gudi; Hari Shanker Gupta; Neela Nataraj (J. Sci. Comput., 2013)

Implementation of high performance Readout Integrated Circuit. - Hari Shanker Gupta; Subhananda Chakrabarti; Maryam Shojaei Baghini; Dinesh Kumar Sharma; A. S. Kiran Kumar; Sanjeev Mehta; Sandip Paul; Ravi Shankar Chaurasia; Arup Roy Chowdhury (MWSCAS, 2014)

Bipolar voltage level shifter. - Hari Shanker Gupta; Shweta Kirkire; Sunil Bhati; Ravi Shankar Chaurasia; Sanjeev Mehta; Arup Roy Choudhary; Dipen Patel; Jaymin Vaghela (VDAT, 2015)

Novel design of a silicon photodetector and its integration in a 4×4 CMOS pixel array. - Hari Shanker Gupta; Satyajit Mohapatra; Nihar R. Mohapatra; Dinesh Kumar Sharma (ISQED, 2016)

A 64b/66b Line Encoding for High Speed Serializers. - Satyajit Mohapatra; Hari Shanker Gupta; Jatindeep Singh; Nihar Ranjan Mohapatra (VLSID, 2017)

Mismatch Resilient 3.5-Bit MDAC with MCS-CFCS. - Satyajit Mohapatra; Hari Shanker Gupta; Nihar Ranjan Mohapatra (ISVLSI, 2018)

Low Power Configurable Readout Integrated Circuit for Infrared Detector. - Hari Shanker Gupta; Pranoy Datta; Maryam Shojaei Baghini; A. S. Kiran Kumar; Dinesh Kumar Sharma (VLSID, 2018)

Large Dynamic Range Readout Integrated Circuit for Infrared Detectors. - Hari Shanker Gupta; Sanjeev Mehta; Maryam Shojaei Baghini; Arup Roy Chowdhury; A. S. Kiran Kumar; Dinesh Kumar Sharma (VLSID, 2019)

A Mismatch Resilient 16-Bit 20 MS/s Pipelined ADC. - Satyajit Mohapatra; Hari Shanker Gupta; Nihar Ranjan Mohapatra; Sanjeev Mehta; Arup Roy Chowdhury; Nisha Pandya (VLSID, 2019)

Sub-nanosecond Delay High Voltage Level Shifter in 0.18μm HV-CMOS Technology for Cryo-Cooler Electronics. - Nishant Kumar; Hari Shanker Gupta; Nilesh M. Desai; Nihar Ranjan Mohapatra (APCCAS, 2023)

A 105-525MHz Integer-N Phase-Locked Loop in Indigenous SCL 180nm CMOS. - Shivam Nigam; Mukund Murali; Hari Shanker Gupta; Saurabh Saxena (VLSID, 2023)

A Programmable and Adaptive Dead-Time Controller for Low-Offset Output Generation for Cryo-Cooler Drive Applications. - Nishant Kumar; Hari Shanker Gupta; Anuj Srivastava; Nihar Ranjan Mohapatra (ISCAS, 2024)

Design and Analysis of 8T Radiation Hardened SRAM using 65nm Process. - Hari Shanker Gupta; Singh Shruti Satyendra; Bhumika Deo; Rane Prathamesh Santosh; Ritesh Khole; Varun Dev Singh; Nishant Kumar; Krish Prakash (VDAT, 2024)

Reliable High-Performance Programmable Voltage Regulator with 0.55A Sink Current for Cryo-Cooler Electronics in 0.18μm HV-CMOS Technology. - Nishant Kumar; Hari Shanker Gupta; Nihar Ranjan Mohapatra (VLSID, 2025)

Ultrafast pulsed laser evaluation of Single Event Transients in opto-couplers. - Kavin Dave; Aditya Mukherjee; Hari Shanker Gupta; Deepak Jain; Shalabh Gupta (CoRR, 2025)