System Level Energy Optimization for Location Aware Computing. - Hariharan Sankaran; Srinivas Katkoori; Umadevi Kailasam (PerCom, 2005)

Floorplan-Based Crosstalk Estimation for Macrocell-Based Designs. - Suvodeep Gupta; Srinivas Katkoori; Hariharan Sankaran (VLSI Design, 2005)

Self-Reconfigurable Analog Array Integrated Circuit Architecture for Space Applications. - Didier Keymeulen; Adrian Stoica; Ricardo Salem Zebulum; Srinivas Katkoori; Pradeep Fernando; Hariharan Sankaran; Mohammad M. Mojarradi; Taher Daud (AHS, 2008)

Bus Binding, Re-ordering, and Encoding for Crosstalk-Producing Switching Activity Minimization during High Level Synthesis. - Hariharan Sankaran; Srinivas Katkoori (DELTA, 2008)

Self-Reconfigurable Mixed-Signal Integrated Circuits Architecture Comprising a Field Programmable Analog Array and a General Purpose Genetic Algorithm IP Core. - Didier Keymeulen; Adrian Stoica; Ricardo Salem Zebulum; Srinivas Katkoori; Pradeep Fernando; Hariharan Sankaran; Mohammad M. Mojarradi; Taher Daud (ICES, 2008)

A customizable FPGA IP core implementation of a general purpose Genetic Algorithm engine. - Pradeep Fernando; Hariharan Sankaran; Srinivas Katkoori; Didier Keymeulen; Adrian Stoica; Ricardo Salem Zebulum; Rajeshuni Ramesham (IPDPS, 2008)

High-Level Synthesis Framework for Crosstalk Minimization in VLSI ASICs. - Hariharan Sankaran (2008)

On-chip dynamic worst-case crosstalk pattern detection and elimination for bus-based macro-cell designs. - Hariharan Sankaran; Srinivas Katkoori (ISQED, 2009)

Floorplan Driven High Level Synthesis for Crosstalk Noise Minimization in Macro-cell Based Designs. - Hariharan Sankaran; Srinivas Katkoori (ISVLSI, 2009)

Simultaneous Scheduling, Allocation, Binding, Re-Ordering, and Encoding for Crosstalk Pattern Minimization During High-Level Synthesis. - Hariharan Sankaran; Srinivas Katkoori (IEEE Trans. Very Large Scale Integr. Syst., 2011)