Hardware Efficient Architecture with Variable Block Size for Motion Estimation. - Nehal N. Shah; Harikrishna Singapuri; Upena D. Dalal (J. Electr. Comput. Eng., 2016)

Implementation of High speed, Low PowerModified Vedic Multiplier and Its Application in Lifting based Discrete Wavelet Transform. - Krupa Desai; Anand D. Darji; Harikrishna M. Singapuri (TENCON, 2019)

Design of Low-Power Wallace Tree Multiplier Architecture Using Modular Approach. - Vaibhavi Solanki; Anand D. Darji; Harikrishna Singapuri (Circuits Syst. Signal Process., 2021)