Robust, reconfigurable, and power-efficient biosignal recording systems. - Vaibhav Karkare; Hariprasad Chandrakumar; Dejan Rozgic; Dejan Markovic (CICC, 2014)

A Simple Area-Efficient Ripple-Rejection Technique for Chopped Biosignal Amplifiers. - Hariprasad Chandrakumar; Dejan Markovic (IEEE Trans. Circuits Syst. II Express Briefs, 2015)

5.5 A 2µW 40mVpp linear-input-range chopper- stabilized bio-signal amplifier with boosted input impedance of 300MΩ and electrode-offset filtering. - Hariprasad Chandrakumar; Dejan Markovic (ISSCC, 2016)

28.6 A ±50mV linear-input-range VCO-based neural-recording front-end with digital nonlinearity correction. - Wenlong Jiang; Vahagn Hokhikyan; Hariprasad Chandrakumar; Vaibhav Karkare; Dejan Markovic (ISSCC, 2016)

A true full-duplex 32-channel 0.135cm3 neural interface. - Dejan Rozgic; Vahagn Hokhikyan; Wenlong Jiang; Sina Basir-Kazeruni; Hariprasad Chandrakumar; Weiyu Leng; Dejan Markovic (BioCAS, 2017)

27.1 A 2.8µW 80mVpp-linear-input-range 1.6GΩ-input impedance bio-signal chopper amplifier tolerant to common-mode interference up to 650mVpp. - Hariprasad Chandrakumar; Dejan Markovic (ISSCC, 2017)

22.7 An inductively-coupled wireless power-transfer system that is immune to distance and load variations. - Jiacheng Pan; Asad A. Abidi; Dejan Rozgic; Hariprasad Chandrakumar; Dejan Markovic (ISSCC, 2017)

A High Dynamic-Range Neural Recording Chopper Amplifier for Simultaneous Neural Recording and Stimulation. - Hariprasad Chandrakumar; Dejan Markovic (IEEE J. Solid State Circuits, 2017)

An 80-mVpp Linear-Input Range, 1.6- $ text{G} Omega $ Input Impedance, Low-Power Chopper Amplifier for Closed-Loop Neural Recording That Is Tolerant to 650-mVpp Common-Mode Interference. - Hariprasad Chandrakumar; Dejan Markovic (IEEE J. Solid State Circuits, 2017)

A ±50-mV Linear-Input-Range VCO-Based Neural-Recording Front-End With Digital Nonlinearity Correction. - Wenlong Jiang; Vahagn Hokhikyan; Hariprasad Chandrakumar; Vaibhav Karkare; Dejan Markovic (IEEE J. Solid State Circuits, 2017)

A 15.2-ENOB continuous-time ΔΣ ADC for a 200mVpp-linear-input-range neural recording front-end. - Hariprasad Chandrakumar; Dejan Markovic (ISSCC, 2018)

A 15.2-ENOB 5-kHz BW 4.5-µW Chopped CT ΔΣ-ADC for Artifact-Tolerant Neural Recording Front Ends. - Hariprasad Chandrakumar; Dejan Markovic (IEEE J. Solid State Circuits, 2018)

A 0.338 cm3, Artifact-Free, 64-Contact Neuromodulation Platform for Simultaneous Stimulation and Sensing. - Dejan Rozgic; Vahagn Hokhikyan; Wenlong Jiang; Ippei Akita; Sina Basir-Kazeruni; Hariprasad Chandrakumar; Dejan Markovic (IEEE Trans. Biomed. Circuits Syst., 2019)

A 50 Gbps 134 GHz 16 QAM 3 m Dielectric Waveguide Transceiver System Implemented in 22nm CMOS. - Thomas William Brown; Georgios C. Dogiamis; Yi-Shin Yeh; Diego Correas-Serrano; Triveni S. Rane; Surej Ravikumar; Jessica C. Chou; Vijaya B. Neeli; Jose Mauricio Marulanda; Neelam Prabhu Gaunkar; Cho-Ying Lu; Iwen Huang; et al. (VLSI Circuits, 2021)

A 48dB-SFDR, 43dB-SNDR, 50GS/s 9-bit 2x-interleaved Nyquist DAC in Intel 16. - Hariprasad Chandrakumar; Thomas William Brown; Dimitri Frolov; Zinia Tuli; Iwen Huang; Said Rami (CICC, 2022)

A 128Gb/s 1.95pJ/b D-Band Receiver with Integrated PLL and ADC in 22nm FinFET. - Abhishek Agrawal; Amy Whitcombe; Woorim Shin; Ritesh Bhat; Somnath Kundu; Peter Sagazio; Hariprasad Chandrakumar; Thomas William Brown; Brent R. Carlton; Christopher D. Hull; Steven Callender; Stefano Pellerano (ISSCC, 2023)

A 128-Gb/s D-Band Receiver With Integrated PLL and ADC Achieving 1.95-pJ/b Efficiency in 22-nm FinFET. - Abhishek Agrawal; Amy Whitcombe; Woorim Shin; Ritesh Bhat; Somnath Kundu; Peter Sagazio; Hariprasad Chandrakumar; Thomas William Brown; Brent R. Carlton; Christopher Dennis Hull; Steven Callender; Stefano Pellerano (IEEE J. Solid State Circuits, 2023)

22.3 A 76mW 40GS/s 7b Time-Interleaved Hybrid Voltage/Time-Domain ADC with Common-Mode Input Tracking. - Amy Whitcombe; Somnath Kundu; Hariprasad Chandrakumar; Abhishek Agrawal; Thomas William Brown; Steven Callender; Brent R. Carlton; Stefano Pellerano (ISSCC, 2024)