Design of Energy Efficient and Low Delay Posit Multiplier. - K. Lakshmi BhanuPrakash Reddy; Haripriya R. S; Keerthija Puli; Subba Ramkumar Reddy Annapalli; Vikramkumar Pudi (VLSID, 2023)

Near-Threshold-at-Gate based Test for Stuck-on Fault in Scan-chain Testing. - Haripriya R. S; Soumitro Vyapari; Jaynarayan T. Tudu (VLSID, 2024)

SiFFS: A Scalable in-Fault Functional Simulation Framework for Fault Criticality Analysis. - Haripriya R. S; Naveen Kollepara; Jaynarayan T. Tudu (ETS, 2025)