Synthesis of heterogeneous pipelined multiprocessor systems using ILP: jpeg case study. - Haris Javaid; Sri Parameswaran (CODES+ISSS, 2008)

A design flow for application specific heterogeneous pipelined multiprocessor systems. - Haris Javaid; Sri Parameswaran (DAC, 2009)

Optimal synthesis of latency and throughput constrained pipelined MPSoCs targeting streaming applications. - Haris Javaid; Xin He 002; Aleksandar Ignjatovic; Sri Parameswaran (CODES+ISSS, 2010)

Rapid runtime estimation methods for pipelined MPSoCs. - Haris Javaid; Andhi Janapsatya; Mohammad Shihabul Haque; Sri Parameswaran (DATE, 2010)

Fidelity metrics for estimation models. - Haris Javaid; Aleksandar Ignjatovic; Sri Parameswaran (ICCAD, 2010)

Rapid Design Space Exploration of Application Specific Heterogeneous Pipelined Multiprocessor Systems. - Haris Javaid; Aleksandar Ignjatovic; Sri Parameswaran (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010)

Low-power adaptive pipelined MPSoCs for multimedia: an H.264 video encoder case study. - Haris Javaid; Muhammad Shafique 001; Sri Parameswaran; Jörg Henkel (DAC, 2011)

Multi-ASIP based parallel and scalable implementation of motion estimation kernel for high definition videos. - Hong Chinh Doan; Haris Javaid; Sri Parameswaran (ESTIMedia, 2011)

System-level application-aware dynamic power management in adaptive pipelined MPSoCs for multimedia. - Haris Javaid; Muhammad Shafique 001; Jörg Henkel; Sri Parameswaran (ICCAD, 2011)

Analyses and Optimisations for Pipelined MPSoCs. - Haris Javaid (2012)

Multi-mode pipelined MPSoCs for streaming applications. - Haris Javaid; Daniel Witono; Sri Parameswaran (ASP-DAC, 2013)

RExCache: Rapid exploration of unified last-level cache. - Su Myat Min; Haris Javaid; Sri Parameswaran (ASP-DAC, 2013)

XDRA: exploration and optimization of last-level cache for energy reduction in DDR DRAMs. - Su Myat Min; Haris Javaid; Sri Parameswaran (DAC, 2013)

System-level optimization of on-chip communication using express links for throughput constrained MPSoCs. - Haseeb Bokhari; Haris Javaid; Sri Parameswaran (ESTIMedia, 2013)

Energy-aware synthesis of application specific MPSoCs. - Thannirmalai Somu Muthukaruppan; Haris Javaid; Tulika Mitra; Sri Parameswaran (ICCD, 2013)

A case study on exploration of last-level cache for energy reduction in DDR3 DRAM. - Su Myat Min; Haris Javaid; Aleksandar Ignjatovic; Sri Parameswaran (MECO, 2013)

Pipelined Multiprocessor System-on-Chip for Multimedia. - Haris Javaid; Sri Parameswaran (Springer, 2014)

darkNoC: Designing Energy-Efficient Network-on-Chip with Multi-Vt Cells for Dark Silicon. - Haseeb Bokhari; Haris Javaid; Muhammad Shafique 001; Jörg Henkel; Sri Parameswaran (DAC, 2014)

FALCON: A Framework for HierarchicAL Computation of Metrics for CompONent-Based Parameterized SoCs. - Haris Javaid; Yusuke Yachide; Su Myat Min Shwe; Haseeb Bokhari; Sri Parameswaran (DAC, 2014)

Flexible and scalable implementation of H.264/AVC encoder for multiple resolutions using ASIPs. - Hong Chinh Doan; Haris Javaid; Sri Parameswaran (DATE, 2014)

Hardware-based fast exploration of cache hierarchies in application specific MPSoCs. - Isuru Nawinne; Josef Schneider; Haris Javaid; Sri Parameswaran (DATE, 2014)

Energy-Efficient Adaptive Pipelined MPSoCs for Multimedia Applications. - Haris Javaid; Muhammad Shafique 001; Jörg Henkel; Sri Parameswaran (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014)

Performance Estimation of Pipelined MultiProcessor System-on-Chips (MPSoCs). - Haris Javaid; Aleksandar Ignjatovic; Sri Parameswaran (IEEE Trans. Parallel Distributed Syst., 2014)

ADAPT: An adaptive manycore methodology for software pipelined applications. - Xi Zhang 003; Haris Javaid; Muhammad Shafique 001; Jude Angelo Ambrose; Jörg Henkel; Sri Parameswaran (ASP-DAC, 2015)

SuperNet: multimode interconnect architecture for manycore chips. - Haseeb Bokhari; Haris Javaid; Muhammad Shafique 001; Jörg Henkel; Sri Parameswaran (DAC, 2015)

Malleable NoC: dark silicon inspired adaptable Network-on-Chip. - Haseeb Bokhari; Haris Javaid; Muhammad Shafique 001; Jörg Henkel; Sri Parameswaran (DATE, 2015)

E-pipeline: elastic hardware/software pipelines on a many-core fabric. - Xi Zhang 003; Haris Javaid; Muhammad Shafique 001; Jorgen Peddersen; Jörg Henkel; Sri Parameswaran (DATE, 2015)

Exploring Multilevel Cache Hierarchies in Application Specific MPSoCs. - Isuru Nawinne; Haris Javaid; Roshan G. Ragel; Swarnalatha Radhakrishnan; Sri Parameswaran (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015)

Switchable cache: utilising dark silicon for application specific cache optimisations. - Isuru Nawinne; Haris Javaid; Roshan G. Ragel; Sri Parameswaran (IET Comput. Digit. Tech., 2016)

FastProxy: Hardware and Software Acceleration of Stratum Mining Proxy. - Guanwen Zhong; Haris Javaid; Hassaan Saadat; Lingchao Xu; Chengchen Hu; Gordon J. Brebner (CVCBT, 2019)

Approximate Integer and Floating-Point Dividers with Near-Zero Error Bias. - Hassaan Saadat; Haris Javaid; Sri Parameswaran (DAC, 2019)

Optimizing Validation Phase of Hyperledger Fabric. - Haris Javaid; Chengchen Hu; Gordon J. Brebner (MASCOTS, 2019)

WEID: Worst-case Error Improvement in Approximate Dividers. - Hassaan Saadat; Haris Javaid; Aleksandar Ignjatovic; Sri Parameswaran (ASP-DAC, 2020)

REALM: Reduced-Error Approximate Log-based Integer Multiplier. - Hassaan Saadat; Haris Javaid; Aleksandar Ignjatovic; Sri Parameswaran (DATE, 2020)

A Sub-Range Error Characterization based Selection Methodology for Approximate Arithmetic Units. - Hassaan Saadat; Tuo Li 001; Haris Javaid; Sri Parameswaran (VLSID, 2020)

Hardware Trojan Mitigation in Pipelined MPSoCs. - Amin Malekpour; Roshan G. Ragel; Tuo Li 001; Haris Javaid; Aleksandar Ignjatovic; Sri Parameswaran (ACM Trans. Design Autom. Electr. Syst., 2020)

Efficient FPGA-based ECDSA Verification Engine for Permissioned Blockchains. - Rashmi Agrawal 001; Ji Yang; Haris Javaid (ASAP, 2022)

Blockchain Machine: A Network-Attached Hardware Accelerator for Hyperledger Fabric. - Haris Javaid; Ji Yang; Nathania Santoso; Mohit Upadhyay; Sundararajarao Mohan; Chengchen Hu; Gordon J. Brebner (ICDCS, 2022)

Improving Energy Efficiency of Permissioned Blockchains Using FPGAs. - Nathania Santoso; Haris Javaid (ICPADS, 2022)

Demo: Enabling DNN Inference in the Network Data Plane. - Siddhartha 001; Justin Tan; Rajesh Bansal; Huang Chee Cheun; Yuta Tokusashi; Chong Yew Kwan; Haris Javaid; Mario Baldi (EuroP4@CoNEXT, 2023)

A Primer on RecoNIC: RDMA-enabled Compute Offloading on SmartNIC. - Guanwen Zhong; Aditya Kolekar; Burin Amornpaisannon; Inho Choi; Haris Javaid; Mario Baldi (CoRR, 2023)

ApproxTrain: Fast Simulation of Approximate Multipliers for DNN Training and Inference. - Jing Gong; Hassaan Saadat; Hasindu Gamaarachchi; Haris Javaid; Xiaobo Sharon Hu; Sri Parameswaran (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

SEA: Sign-Separated Accumulation Scheme for Resource-Efficient DNN Accelerators. - Jing Gong; Hassaan Saadat; Haris Javaid; Hasindu Gamaarachchi; David Taubman; Sri Parameswaran (DATE, 2024)