Die stacking using 3D-wafer level packaging copper/polymer through-si via technology and Cu/Sn interconnect bumping. - Yann Civale; Deniz Sabuncuoglu Tezcan; Harold G. G. Philipsen; P. Jaenen; Rahul Agarwal; F. Duval; Philippe Soussan; Youssef Travaly; Eric Beyne (3DIC, 2009)

Low temperature through-Si via fabrication using electroless deposition. - Fumihiro Inoue; Harold Philipsen; Alex Radisic; Silvia Armini; Peter Leunissen; Hiroshi Miyake; Ryohei Arima; Tomohiro Shimizu; Toshiaki Ito; Hirofumi Seki; Yuko Shinozaki; Tomohiko Yamamoto; et al. (3DIC, 2011)

Cu seeding using electroless deposition on Ru liner for high aspect ratio through-Si vias. - Fumihiro Inoue; Harold Philipsen; Marleen H. van der Veen; Kevin Vandersmissen; Stefaan Van Huylenbroeck; Herbert Struyf; Tetsu Tanaka (3DIC, 2014)

Impact of oxide liner properties on TSV Cu pumping and TSV stress. - Joke De Messemaeker; O. Varela Pedreira; A. Moussa; Nabi Nabiollahi; Kris Vanstreels; Stefaan Van Huylenbroeck; Harold Philipsen; Patrick Verdonck; Bart Vandevelde; Ingrid De Wolf; Eric Beyne; Kris Croes (IRPS, 2015)

Liquid Memory and the Future of Data Storage. - Maarten Rosmeulen; Cesar J. Lockhart de la Rosa; K. Willems; S. Fransen; B.-Y. Shih; Devin Verreck; V. Kalangi; F. Yasin; Harold Philipsen; Y. T. Set; N. Ronchi; W. Van Roy; et al. (IMW, 2022)