Design Exploration of Small Bit-Width Multipliers Using Approximate Logic Design (ALD) Tool. - Haroon Waris; Weiqiang Liu 001; Pengfei Huang; Ruizhe Ma; Chenghua Wang; Fabrizio Lombardi (DSP, 2018)

Design and Evaluation of a Power-Efficient Approximate Systolic Array Architecture for Matrix Multiplication. - Haroon Waris; Chenghua Wang; Weiqiang Liu 001; Fabrizio Lombardi (SiPS, 2019)

High-performance approximate half and full adder cells using NAND logic gate. - Haroon Waris; Chenghua Wang; Weiqiang Liu 001 (IEICE Electron. Express, 2019)

Hybrid Low Radix Encoding-Based Approximate Booth Multipliers. - Haroon Waris; Chenghua Wang; Weiqiang Liu 001 (IEEE Trans. Circuits Syst., 2020)

AxBMs: Approximate Radix-8 Booth Multipliers for High-Performance FPGA-Based Accelerators. - Haroon Waris; Chenghua Wang; Weiqiang Liu 001; Fabrizio Lombardi (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

Design and Analysis of Energy-Efficient Dynamic Range Approximate Logarithmic Multipliers for Machine Learning. - Peipei Yin; Chenghua Wang; Haroon Waris; Weiqiang Liu 001; Yinhe Han 001; Fabrizio Lombardi (IEEE Trans. Sustain. Comput., 2021)

AxSA: On the Design of High-Performance and Power-Efficient Approximate Systolic Arrays for Matrix Multiplication. - Haroon Waris; Chenghua Wang; Weiqiang Liu 001; Fabrizio Lombardi (J. Signal Process. Syst., 2021)

An Automated Logic-Level Framework for Approximate Modular Arithmetic Circuits. - Haroon Waris; Chenghua Wang; Weiqiang Liu 001 (Approximate Computing, 2022)

Architectural-Space Exploration of Energy-Efficient Approximate Arithmetic Units for Error-Tolerant Applications. - Haroon Waris; Chenghua Wang; Weiqiang Liu 001 (ISVLSI, 2022)

Hybrid Partial Product-Based High-Performance Approximate Recursive Multipliers. - Haroon Waris; Chenghua Wang; Weiqiang Liu 001; Jie Han 001; Fabrizio Lombardi (IEEE Trans. Emerg. Top. Comput., 2022)

AxRMs: Approximate Recursive Multipliers Using High-Performance Building Blocks. - Haroon Waris; Chenghua Wang; Chenyu Xu; Weiqiang Liu 001 (IEEE Trans. Emerg. Top. Comput., 2022)

Approximate Softmax Functions for Energy-Efficient Deep Neural Networks. - Ke Chen 018; Yue Gao; Haroon Waris; Weiqiang Liu 001; Fabrizio Lombardi (IEEE Trans. Very Large Scale Integr. Syst., 2023)

Exact and Approximate Squarers for Error-Tolerant Applications. - Ke Chen 018; Chenyu Xu; Haroon Waris; Weiqiang Liu 001; Paolo Montuschi; Fabrizio Lombardi (IEEE Trans. Computers, 2023)

Design Co-Processor Based on Partially Homomorphic Encryption Execution Using Open-Source Tool. - Mujahid Bilal; M. Kamran Bhatti; Muhammad Kahsif Minhas; Haroon Waris (VLSI-SoC, 2024)

FVDCLS: Functional Verification of RISCV Based Dual-Core Lockstep Feature Using Fault Injection Mechanism. - Muhammad Kashif Minhas; Haroon Waris; Sajid Baloch (VLSI-SoC, 2024)

FPAX: A Fast Prior Knowledge-Based Framework for DSE in Approximate Configurations. - Yuqin Dou; Chenghua Wang; Haroon Waris; Roger F. Woods; Weiqiang Liu 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

Low-Cost Yet Effective Trojan Mitigation Techniques for Approximate Systems. - Zohaib Tariq; Haroon Waris; Rehan Ahmed; Yuqin Dou; Weiqiang Liu 001; Muhammad Imran 010 (IEEE Trans. Circuits Syst. II Express Briefs, 2025)

VEDA: Efficient LLM Generation Through Voting-based KV Cache Eviction and Dataflow-flexible Accelerator. - Zhican Wang; Hongxiang Fan; Haroon Waris; Gang Wang; Zhenyu Li; Jianfei Jiang 001; Yanan Sun 003; Guanghui He (CoRR, 2025)

A Novel Error Metric for Evaluating the Error Correction Capability of Approximate Units. - Yuqin Dou; Zhikuang Cai; Haroon Waris; Roger F. Woods; Weiqiang Liu 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2025)