Design of Charge Pump for Low Power, Wide Range PLL in 65nm CMOS Technology. - Edwin C. Cuizon; Marven A. Yuson; Aileen B. Caberos; Nieva M. Mapula; Harreez M. Villaruz (ISCIT, 2023)

Buck Converter with Variable Output Voltage for Dynamic Voltage Scaling (DVS) Applications. - Harreez M. Villaruz; Hong-Yi Huang; Nieva M. Mapula; Gene Fe P. Palencia (ISCIT, 2023)

A 2μA Quiescent Current Output-Capacitorless LDO with Adaptive Power Transistors for Low Power Management in Energy Harvesting. - Jayson S. Abayan; Winston John F. Astillero; Dennis Von G. Itaas; Nieva M. Mapula; Harreez M. Villaruz; Gene Fe P. Palencia; Rochelle M. Sabarillo; Kevin O. Maglinte; Jefferson A. Hora (TENCON, 2024)

High Speed Low Power Dynamic CMOS Comparator for SAR ADCs. - Jazzmyne Rona M. Agustin; Harreez M. Villaruz; Nieva M. Mapula; Gene Fe P. Palencia (TENCON, 2024)

Dual Mode Output Capacitorless Low Dropout with Low Quiescent Current for Hearing Aid Applications. - Dale Matthew D. Legaspi; Neil F. Mora; Nieva M. Mapula; Thesa L. Vergara; Emrys Leowhel T. Oling; Harreez M. Villaruz; Gene Fe P. Palencia; Rochelle M. Sabarillo; Kevin O. Maglinte (TENCON, 2024)