Principles of verifiable RTL design - a functional coding style supporting verification processes in Verilog. - Lionel Bening; Harry Foster (Kluwer, 2001)

Optimizing Multiple EDA Tools within the ASIC Design Flow. - Lionel Bening; Harry Foster (IEEE Des. Test Comput., 2001)

Applied Boolean Equivalence Verification and RTL Static Sign-Off. - Harry Foster (IEEE Des. Test Comput., 2001)

Formal verification methods: getting around the brick wall. - David L. Dill; Nate James; Shishpal Rawat; Gérard Berry; Limor Fix; Harry Foster; Rajeev K. Ranjan 001; Gunnar Stålmarck; Curt Widdoes (DAC, 2002)

Refactoring digital hardware designs with assertion libraries. - Flávio Miana de Paula; Claudionor José Nunes Coelho Jr.; Harry Foster; José Augusto Miranda Nacif; Joseph Tompkins; Antônio Otávio Fernandes; Diógenes Cecilio da Silva Jr. (HLDVT, 2003)

On-Chip Property Verification Using Assertion Processors. - José Augusto Miranda Nacif; Claudionor Nunes Coelho; Harry Foster; Flávio Miana de Paula; Edjard Mota; Márcia Roberta Falcão Mota; Antônio Otávio Fernandes (VLSI-SoC (Selected Papers), 2003)

The Chip is Ready. Am I done? On-chip Verification using Assertion Processors. - José Augusto Miranda Nacif; Flávio Miana de Paula; Harry Foster; Claudionor José Nunes Coelho Jr.; Antônio Otávio Fernandes (VLSI-SOC, 2003)

Assertion-based design, Second Edition. - Harry Foster; Adam Krolnik; David Lacey (Kluwer, 2004)

Panel: Driving the intelligent testbanch: are we there yet? - Harry Foster (HLDVT, 2004)

Exception handling in microprocessors using assertion libraries. - Fernando Cortez Sica; Claudionor José Nunes Coelho Jr.; José Augusto Miranda Nacif; Harry Foster; Antônio Otávio Fernandes (SBCCI, 2004)

Is methodology the highway out of verification hell? - Francine Bacchini; Gabe Moretti; Harry Foster; Janick Bergeron; Masayuki Nakamura; Shrenik Mehta; Laurent Ducousso (DAC, 2005)

Are Today's Verification Tools Able to Handle Current Design Challenges? - Rich Faris; Ken Larsen; Harry Foster; Stuart Swan (ICCD, 2005)

Building a verification test plan: trading brute force for finesse. - Janick Bergeron; Harry Foster; Andrew Piziali; Raj Shekher Mitra; Catherine Ahlschlager; Doron Stein (DAC, 2006)

Panel: Assertion-Based Verification -What's the Big Deal? - Sandeep K. Shukla; Alan J. Hu; Jacob Abrahams; Pranav Ashar; Harry Foster; Avner Landver; Carl Pixley (HLDVT, 2006)

Panel: Unified approach leading to a seamlessly evolving test bench for all phases of a multi-core design, validation and production test. - Sunil Kakkar; Janick Bergeron; Brian Bailey; Harry Foster; Ian Harris (HLDVT, 2007)

Assertion-Based Verification: Industry Myths to Realities (Invited Tutorial). - Harry Foster (CAV, 2008)

Functional test selection based on unsupervised support vector analysis. - Onur Guzey; Li-C. Wang; Jeremy R. Levitt; Harry Foster (DAC, 2008)

Pain, Possibilities, and Prescriptions Industry Trends in Advanced Functional Verification. - Harry Foster (Haifa Verification Conference, 2009)

Applied Assertion-Based Verification: An Industry Perspective. - Harry Foster (Found. Trends Electron. Des. Autom., 2009)

Bridging pre-silicon verification and post-silicon validation. - Amir Nahir; Avi Ziv; Rajesh Galivanche; Alan J. Hu; Miron Abramovici; Albert Camilleri; Bob Bentley; Harry Foster; Valeria Bertacco; Shakti Kapoor (DAC, 2010)

Increasing the Efficiency of Simulation-Based Functional Verification Through Unsupervised Support Vector Analysis. - Onur Guzey; Li-C. Wang; Jeremy R. Levitt; Harry Foster (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010)

Why the design productivity gap never happened. - Harry Foster (ICCAD, 2013)

Keynote talk III: Industry pulse: Trends in function verification. - Harry Foster (MEMOCODE, 2013)

Trends in functional verification: a 2014 industry study. - Harry D. Foster (DAC, 2015)

2018 FPGA Functional Verification Trends. - Harry Foster (MTV, 2018)

General Chair's Message. - Harry Foster (DAC, 2021)

Report on the Design Automation Conference (DAC 2021). - Harry Foster; Rob Oshana; Jörg Henkel; Vivek De (IEEE Des. Test, 2022)

Specification Mining Facing Generative AI. - Goerschwin Fey; Harry Foster; Tara Ghasempuri; Badri Gopalan; Jörg Müller 011; Manish Pandey (DATE, 2025)