A steady state bound for resilient packet rings. - Changcheng Huang; Harry Peng; Fengjie Yuan; John Hawkins (GLOBECOM, 2003)

A comparison of two buffer insertion ring architectures with fairness algorithms. - Mark Joseph Francisco; Fengjie Yuan; Changcheng Huang; Harry Peng (ICC, 2003)

Access delay performance of resilient packet ring under bursty periodic class B traffic load. - Yan F. Robichaud; Changcheng Huang; Jinmei Yang; Harry Peng (ICC, 2004)

A deterministic bound for the access delay of resilient packet rings. - Changcheng Huang; Harry Peng; Fengjie Yuan (IEEE Commun. Lett., 2005)