Circuit Implementation of a 300-MHz 64-bit Second-generation CMOS Alpha CPU - William J. Bowhill; Shane L. Bell; Bradley J. Benschneider; Andrew J. Black; Sharon M. Britton; Ruben W. Castelino; Dale R. Donchin; John H. Edmondson; Harry R. Fair III; Paul E. Gronowski; Anil K. Jain 003; Patricia L. Kroesen; et al. (Digit. Tech. J., 1995)

5.5 Steamroller: An x86-64 core implemented in 28nm bulk CMOS. - Kevin Gillespie; Harry R. Fair III; Carson Henrion; Ravi Jotwani; Stephen V. Kosonocky; Robert S. Orefice; Donald A. Priore; Jonathan White; Kathryn Wilcox (ISSCC, 2014)

4.8 A 28nm x86 APU optimized for power and area efficiency. - Kathryn Wilcox; David Akeson; Harry R. Fair III; Jim Farrell; Dave Johnson 002; Guhan Krishnan; Hugh McIntyre; Edward McLellan; Samuel Naffziger; Russell Schreiber; Sriram Sundaram; Jonathan White (ISSCC, 2015)

Steamroller Module and Adaptive Clocking System in 28 nm CMOS. - Kathryn Wilcox; Robert Cole; Harry R. Fair III; Kevin Gillespie; Aaron Grenat; Carson Henrion; Ravi Jotwani; Stephen Kosonocky; Benjamin Munger; Samuel Naffziger; Robert S. Orefice; Sanjay Pant; et al. (IEEE J. Solid State Circuits, 2015)

Carrizo: A High Performance, Energy Efficient 28 nm APU. - Benjamin Munger; David Akeson; Srikanth Arekapudi; Tom Burd; Harry R. Fair III; Jim Farrell; Dave Johnson 002; Guhan Krishnan; Hugh McIntyre; Edward McLellan; Samuel Naffziger; Russell Schreiber; et al. (IEEE J. Solid State Circuits, 2016)

"Zen 4": The AMD 5nm 5.7GHz x86-64 Microprocessor Core. - Benjamin Munger; Kathy Wilcox; Jeshuah Sniderman; Chuck Tung; Brett Johnson; Russell Schreiber; Carson Henrion; Kevin Gillespie; Tom Burd; Harry R. Fair III; Dave Johnson 002; Jonathan White; et al. (ISSCC, 2023)