Multi-Frequency Electrical Impedance Tomography System With Automatic Self-Calibration for Long-Term Monitoring. - Hun Wi; Harsh Sohal; Alistair Lee McEwan; Eung Je Woo; Tong In Oh (IEEE Trans. Biomed. Circuits Syst., 2014)

Sleepy CMOS-Sleepy Stack (SC-SS): A Novel High Speed, Area and Power Efficient Technique for VLSI Circuit Design. - Anjali Sharma; Harsh Sohal; Harsimran Jit Kaur (J. Circuits Syst. Comput., 2019)

Statistical Analysis of HRV Parameters for the Detection of Arrhythmia. - Kirthi Tripathi; Harsh Sohal; Shruti Jain (Int. J. Image Graph., 2020)

A Novel ASIC-Based Variable Latency Speculative Parallel Prefix Adder for Image Processing Application. - Garima Thakur; Harsh Sohal; Shruti Jain (Circuits Syst. Signal Process., 2021)

A novel parallel prefix adder for optimized Radix-2 FFT processor. - Garima Thakur; Harsh Sohal; Shruti Jain (Multidimens. Syst. Signal Process., 2021)

A survey of deep learning techniques for detecting and recognizing objects in complex environments. - Ashish Kumar Dogra; Vipal Sharma; Harsh Sohal (Comput. Sci. Rev., 2024)

Power-Area-Optimized Approximate Multiplier Design for Image Fusion. - Garima Thakur; Harsh Sohal; Shruti Jain (Circuits Syst. Signal Process., 2024)

Design and Analysis of Low Power Approximate Multiplier Using Novel Compressor. - Garima Thakur; Harsh Sohal; Shruti Jain (SN Comput. Sci., 2024)