Multiprocessor performance for real-time processing of video coding applications. - Hartwig Jeschke; Klaus Gaedke; Peter Pirsch (IEEE Trans. Circuits Syst. Video Technol., 1992)

A VLSI based MIMD architecture of a multiprocessor system for real-time video processing applications. - Klaus Gaedke; Hartwig Jeschke; Peter Pirsch (J. VLSI Signal Process., 1993)

A MIMD-based video signal processing architecture suitable for large area integration and a 16.6-cm2 monolithic implementation. - Klaus Herrmann 002; Jan Otterstedt; Hartwig Jeschke; M. Kuboschek (IEEE Trans. Very Large Scale Integr. Syst., 1998)

Design Space Expoloration Chip Size Estimation for SOC Design Space Exploration. - Hartwig Jeschke (ICSAMOS, 2006)

Efficiency Measures for Multimedia SOCs. - Hartwig Jeschke (SAMOS, 2007)

Chip size estimation for SOC design space exploration. - Hartwig Jeschke (J. Syst. Archit., 2007)

Efficiency measures for SOC concepts. - Hartwig Jeschke (J. Syst. Archit., 2008)

Energy- and latency-aware simulation of battery-operated wireless embedded networks for home automation. - Daniel Pfefferkorn; Hartwig Jeschke; Holger Blume (SIES, 2015)

Guest Editorial: Special Issue on Embedded Computer Systems: Architectures, Modeling and Simulation. - John McAllister; David Guevorkian; Hartwig Jeschke; Mihai Sima (Int. J. Parallel Program., 2015)