Spatial versus temporal stability issues in image processing neuro chips. - Takashi Matsumoto 001; Haruo Kobayashi 001; Yoshio Togawa (IEEE Trans. Neural Networks, 1992)

Image processing regularization filters on layered architecture. - Haruo Kobayashi 001; Takashi Matsumoto 001; Tetsuya Yagi; Takuji Shimmi (Neural Networks, 1993)

Error Correction Algorithm for Folding/Interpolation ADC. - Haruo Kobayashi 001; Hiroshi Sakayori; Tsutomu Tobari; Hiroyuki Matsuura (ISCAS, 1995)

Light-adaptive architectures for regularization vision chips. - Haruo Kobayashi 001; Takashi Matsumoto 001; Tetsuya Yagi; Koji Tanaka (Neural Networks, 1995)

Two-dimensional spatio-temporal dynamics of analog image processing neural networks. - Haruo Kobayashi 001; Takashi Matsumoto 001; Jun Sanekata (IEEE Trans. Neural Networks, 1995)

Spatial and temporal stability of vision chips including parasitic inductances and capacitances. - Haruo Kobayashi 001; Takashi Matsumoto 001 (ICASSP, 1998)

A highly linear second-order stage for 500-MHz third-order and fifth-order filters. - Khayrollah Hadidi; K. Eguchi; Takashi Matsumoto 001; Haruo Kobayashi 001 (ICECS, 1998)

Vision chip architecture with light adaptation mechanism. - Tetsuya Yagi; Haruo Kobayashi 001; Takashi Matsumoto 001; Koji Tanaka (Artif. Life Robotics, 1998)

Aperture jitter effects in wideband ADC systems. - Haruo Kobayashi 001; Masanao Morimura; Kensuke Kobayashi; Yoshitaka Onaya (ICECS, 1999)

A high-speed CMOS track/hold circuit. - Mohd Asmawi Mohamed Zin; Haruo Kobayashi 001; Kazuya Kobayashi; Jun-ichi Ichimura; Hao San; Yoshitaka Onaya; Yasuyuki Kimura; Yasushi Yuminaka; Yoshisato Sasaki; Kouji Tanaka; Fuminori Abe (ICECS, 1999)

Modeling and parameter extraction technique for high-voltage MOS device. - Takao Myono; E. Nishibe; S. Kikuchi; K. Iwatsu; Tatsuya Suzuki; Y. Sasaki; K. Itoh; Haruo Kobayashi 001 (ISCAS (6), 1999)

ADC standard and testing in Japanese industry. - Haruo Kobayashi 001; Kensuke Kobayashi; Hiroshi Sakayori; Yasuyuki Kimura (Comput. Stand. Interfaces, 2001)

A Quasi-Coherent Sampling Method for Wideband Data Acquisition. - Masaru Kimura; Kensuke Kobayashi; Haruo Kobayashi 001 (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002)

Sampling Jitter and Finite Aperture Time Effects in Wideband Data Acquisition Systems. - Haruo Kobayashi 001; Kensuke Kobayashi; Masanao Morimura; Yoshitaka Onaya; Yuuich Takahashi; Kouhei Enomoto; Hideyuki Kogure (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002)

Channel Linearity Mismatch Effects in Time-Interleaved ADC Systems. - Naoki Kurosawa; Haruo Kobayashi 001; Kensuke Kobayashi (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002)

Spread-Spectrum Clocking in Switching Regulators for EMI Reduction. - Takayuki Daimon; Hiroshi Sadamura; Takayuki Shindou; Haruo Kobayashi 001; Masashi Kono; Takao Myono; Tatsuya Suzuki; Shuhei Kawai; Takashi Iijima (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003)

Algorithms for Digital Correction of ADC Nonlinearity. - Haruo Kobayashi 001; Hiroshi Yagi; Takanori Komuro; Hiroshi Sakayori (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003)

High-Efficiency Charge-Pump Circuits which Use a 0.5Vdd-Step Pumping Method. - Takao Myono; Tatsuya Suzuki; Akira Uemoto; Shuhei Kawai; Takashi Iijima; Nobuyuki Kuroiwa; Haruo Kobayashi 001 (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003)

An Element Rotation Algorithm for Multi-bit DAC Nonlinearities in Complex Bandpass Delta SigmaAD Modulators. - Hao San; Haruo Kobayashi 001; Shinya Kawakami; Nobuyuki Kuroiwa (VLSI Design, 2004)

A practical BIST circuit for analog portion in deep sub-micron CMOS system LSI. - Takanori Komuro; Naoto Hayasaka; Haruo Kobayashi 001; Hiroshi Sakayori (ISCAS (5), 2005)

Reducing Spurious Output of Balanced Modulators by Dynamic Matching of I, Q Quadrature Paths. - Jun Otsuki; Hao San; Haruo Kobayashi 001; Takanori Komuro; Yoshihisa Yamada; Aiyan Liu (IEICE Trans. Electron., 2005)

A Practical Analog BIST Cooperated with an LSI Tester. - Takanori Komuro; Naoto Hayasaka; Haruo Kobayashi 001; Hiroshi Sakayori (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006)

Complex Bandpass DeltaSigmaAD Modulator Architecture without I, Q-Path Crossing Layout. - Hao San; Akira Hayakawa; Yoshitaka Jingu; Hiroki Wada; Hiroyuki Hagiwara; Kazuyuki Kobayashi; Haruo Kobayashi 001; Tatsuji Matsuura; Kouichi Yahagi; Junya Kudoh; Hideo Nakane; Masao Hotta; et al. (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006)

High-Speed Continuous-Time Subsampling Bandpass DeltaSigmaAD Modulator Architecture Employing Radio Frequency DAC. - Masafumi Uemori; Haruo Kobayashi 001; Tomonari Ichikawa; Atsushi Wada; Koichiro Mashiko; Toshiro Tsukada; Masao Hotta (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006)

A 2.8-V Multibit Complex Bandpass Delta-Sigma-AD Modulator in 0.18µm CMOS. - Hao San; Yoshitaka Jingu; Hiroki Wada; Hiroyuki Hagiwara; Akira Hayakawa; Haruo Kobayashi 001; Masao Hotta (ASP-DAC, 2007)

A Second-Order Multibit Complex Bandpass DeltaSigmaAD Modulator with I, Q Dynamic Matching and DWA Algorithm. - Hao San; Yoshitaka Jingu; Hiroki Wada; Hiroyuki Hagiwara; Akira Hayakawa; Haruo Kobayashi 001; Tatsuji Matsuura; Kouichi Yahagi; Junya Kudoh; Hideo Nakane; Masao Hotta; Toshiro Tsukada; et al. (IEICE Trans. Electron., 2007)

Total Harmonic Distortion Measurement System of Electronic Devices up to 100 MHz With Remarkable Sensitivity. - Takanori Komuro; Shingo Sobukawa; Hiroshi Sakayori; Masashi Kono; Haruo Kobayashi 001 (IEEE Trans. Instrum. Meas., 2007)

New architecture for envelope-tracking power amplifier for base station. - Akihiro Kanbe; Masato Kaneta; Fuminori Yui; Haruo Kobayashi 001; Nobukazu Takai; Tatsuhiro Shimura; Hitoshi Hirata; Kentarou Yamagishi (APCCAS, 2008)

ΔΣAD modulator for low power application. - Hajime Konagaya; HaiJun Lin; Hao San; Haruo Kobayashi 001; Kazumasa Ando; Hiroshi Yoshida; Chieto Murayama; Yukihiro Nisida (APCCAS, 2008)

High-resolution DPWM generator for digitally controlled DC-DC converters. - Ibuki Mori; Keigo Kimura; Yoshihisa Yamada; Haruo Kobayashi 001; Yasunori Kobori; Santhos Ario Wibowo; Kazuya Shimizu; Masashi Kono; Hao San (APCCAS, 2008)

SAR ADC algorithm with redundancy. - Tomohiko Ogawa; Haruo Kobayashi 001; Masao Hotta; Yosuke Takahashi; Hao San; Nobukazu Takai (APCCAS, 2008)

Analysis of coupled inductors for low-ripple fast-response buck converter. - Santhos Ario Wibowo; Zhang Ting; Masashi Kono; Tetsuya Taura; Yasunori Kobori; Haruo Kobayashi 001 (APCCAS, 2008)

Technique to Improve the Performance of Time-Interleaved A-D Converters with Mismatches of Non-linearity. - Koji Asami; Hidetaka Suzuki; Hiroyuki Miyajima; Tetsuya Taura; Haruo Kobayashi 001 (ATS, 2008)

Novel Architecture of Feedforward Second-Order Multibit Delta-Sigma-AD Modulator. - Hao San; Hajime Konagaya; Feng Xu; Atsushi Motozawa; Haruo Kobayashi 001; Kazumasa Ando; Hiroshi Yoshida; Chieto Murayama; Kanichi Miyazawa (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008)

A Time-to-Digital Converter with small circuitry. - Kazuya Shimizu; Masato Kaneta; HaiJun Lin; Haruo Kobayashi 001; Nobukazu Takai; Masao Hotta (ASP-DAC, 2009)

Technique to Improve the Performance of Time-Interleaved A-D Converters with Mismatches of Non-linearity. - Koji Asami; Takahide Suzuki; Hiroyuki Miyajima; Tetsuya Taura; Haruo Kobayashi 001 (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009)

Foreword. - Haruo Kobayashi 001 (IEICE Trans. Electron., 2009)

EMI Reduction by Spread-Spectrum Clocking in Digitally-Controlled DC-DC Converters. - Ibuki Mori; Yoshihisa Yamada; Santhos A. Wibowo; Masashi Kono; Haruo Kobayashi 001; Yukihiro Fujimura; Nobukazu Takai; Toshio Sugiyama; Isao Fukai; Norihisa Onishi; Ichiro Takeda; Jun-Ichi Matsuda (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009)

Cross-Noise-Coupled Architecture of Complex Bandpass DeltaSigmaAD Modulator. - Hao San; Haruo Kobayashi 001 (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009)

Analysis of Coupled Inductors for Low-Ripple Fast-Response Buck Converter. - Santhos A. Wibowo; Zhang Ting; Masashi Kono; Tetsuya Taura; Yasunori Kobori; Ken-ichi Onda; Haruo Kobayashi 001 (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009)

Stochastic TDC architecture with self-calibration. - Satoshi Ito; Shigeyuki Nishimura; Haruo Kobayashi 001; Satoshi Uemori; Yohei Tan; Nobukazu Takai; Takahiro J. Yamaguchi; Kiichi Niitsu (APCCAS, 2010)

SAR ADC that is configurable to optimize yield. - Tomohiko Ogawa; Haruo Kobayashi 001; Yohei Tan; Satoshi Ito; Satoshi Uemori; Nobukazu Takai; Kiichi Niitsu; Takahiro J. Yamaguchi; Tatsuji Matsuura; Nobuyoshi Ishikawa (APCCAS, 2010)

Non-binary SAR ADC with digital error correction for low power applications. - Tomohiko Ogawa; Tatsuji Matsuura; Haruo Kobayashi 001; Nobukazu Takai; Masao Hotta; Hao San; Akira Abe; Katsuyoshi Yagi; Toshihiko Mori (APCCAS, 2010)

Single inductor DC-DC converter with bipolar outputs using charge pump. - Kenji Takahashi; Hajime Yokoo; Shyunsuke Miwa; Kengo Tsushida; Hiroyuki Iwase; Kazuki Murakami; Nobukazu Takai; Haruo Kobayashi 001; Takahiro Odaguchi; Shigeki Takayama; Isao Fukai; Jun-Ichi Matsuda (APCCAS, 2010)

ADC linearity test signal generation algorithm. - Satoshi Uemori; Takahiro J. Yamaguchi; Satoshi Ito; Yohei Tan; Haruo Kobayashi 001; Nobukazu Takai; Kiichi Niitsu; Nobuyoshi Ishikawa (APCCAS, 2010)

Background calibration algorithm for pipelined ADC with open-loop residue amplifier using split ADC structure. - Takuya Yagi; Kunihiko Usui; Tatsuji Matsuura; Satoshi Uemori; Yohei Tan; Satoshi Ito; Haruo Kobayashi 001 (APCCAS, 2010)

Timing skew compensation technique using digital filter with novel linear phase condition. - Koji Asami; Hiroyuki Miyajima; Tsuyoshi Kurosawa; Takenori Tateiwa; Haruo Kobayashi 001 (ITC, 2010)

SAR ADC Algorithm with Redundancy and Digital Error Correction. - Tomohiko Ogawa; Haruo Kobayashi 001; Yosuke Takahashi; Nobukazu Takai; Masao Hotta; Hao San; Tatsuji Matsuura; Akira Abe; Katsuyoshi Yagi; Toshihiko Mori (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2010)

Noise-Coupled Image Rejection Architecture of Complex Bandpass DeltaSigmaAD Modulator. - Hao San; Haruo Kobayashi 001 (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2010)

An on-chip timing jitter measurement circuit using a self-referenced clock and a cascaded time difference amplifier with duty-cycle compensation. - Kiichi Niitsu; Masato Sakurai; Naohiro Harigai; Takahiro J. Yamaguchi; Haruo Kobayashi 001 (A-SSCC, 2011)

Analysis of jitter accumulation in interleaved phase frequency detectors for high-accuracy on-chip jitter measurements. - Masato Sakurai; Kiichi Niitsu; Naohiro Harigai; Daiki Hirabayashi; Daiki Oki; Takahiro J. Yamaguchi; Haruo Kobayashi 001 (ISOCC, 2011)

Design for Testability That Reduces Linearity Testing Time of SAR ADCs. - Tomohiko Ogawa; Haruo Kobayashi 001; Satoshi Uemori; Yohei Tan; Satoshi Ito; Nobukazu Takai; Takahiro J. Yamaguchi; Kiichi Niitsu (IEICE Trans. Electron., 2011)

Background Self-Calibration Algorithm for Pipelined ADC Using Split ADC Scheme. - Takuya Yagi; Kunihiko Usui; Tatsuji Matsuura; Satoshi Uemori; Satoshi Ito; Yohei Tan; Haruo Kobayashi 001 (IEICE Trans. Electron., 2011)

DC-DC converter with continuous-time feed-forward Sigma-Delta modulator control. - Hong Gao 006; Lin Xing; Yasunori Kobori; Feng Zhao; Haruo Kobayashi 001; Shyunsuke Miwa; Atsushi Motozawa; Zachary Nosker; Kiichi Niitsu; Nobukazu Takai; Takahiro Odaguchi; Isao Nakanishi; et al. (APCCAS, 2012)

Digitally-controlled Gm-C bandpass filter. - Guanglei Jin; Hao Chen; Chuan Gao; Yunpeng Zhang; Haruo Kobayashi 001; Nobukazu Takai; Kiichi Niitsu; Khayrollah Hadidi (APCCAS, 2012)

Single inductor dual output DC-DC converter design with exclusive control. - Yasunori Kobori; Qiulin Zhu; Murong Li; Feng Zhao; Zachary Nosker; Shu Wu; Shaiful N. Mohyar; Masanori Onozawa; Haruo Kobayashi 001; Nobukazu Takai; Kiichi Niitsu; Takahiro Odaguchi; et al. (APCCAS, 2012)

Multi-bit sigma-delta TDC architecture with self-calibration. - Satoshi Uemori; Masamichi Ishii; Haruo Kobayashi 001; Yuta Doi; Osamu Kobayashi; Tatsuji Matsuura; Kiichi Niitsu; Yuta Arakawa; Daiki Hirabayashi; Yuji Yano; Tatsuhiro Gake; Nobukazu Takai; et al. (APCCAS, 2012)

A reference-free on-chip timing jitter measurement circuit using self-referenced clock and a cascaded time difference amplifier in 65nm CMOS. - Kiichi Niitsu; Masato Sakurai; Naohiro Harigai; Daiki Hirabayashi; Takahiro J. Yamaguchi; Haruo Kobayashi 001 (ASP-DAC, 2012)

Two-Tone Signal Generation for Communication Application ADC Testing. - Keisuke Kato; Fumitaka Abe; Kazuyuki Wakabayashi; Chuan Gao; Takafumi Yamada; Haruo Kobayashi 001; Osamu Kobayashi; Kiichi Niitsu (Asian Test Symposium, 2012)

Post-Silicon Jitter Measurements. - Kiichi Niitsu; Takahiro J. Yamaguchi; Masahiro Ishida; Haruo Kobayashi 001 (Asian Test Symposium, 2012)

A New Procedure for Measuring High-Accuracy Probability Density Functions. - Takahiro J. Yamaguchi; Kunihiro Asada; Kiichi Niitsu; Mohamed Abbas; Satoshi Komatsu; Haruo Kobayashi 001; Jose A. Moreira (Asian Test Symposium, 2012)

A clock jitter reduction circuit using gated phase blending between self-delayed clock edges. - Kiichi Niitsu; Naohiro Harigai; Daiki Hirabayashi; Daiki Oki; Masato Sakurai; Osamu Kobayashi; Takahiro J. Yamaguchi; Haruo Kobayashi 001 (VLSIC, 2012)

Low-Distortion Sinewave Generation Method Using Arbitrary Waveform Generator. - Kazuyuki Wakabayashi; Keisuke Kato; Takafumi Yamada; Osamu Kobayashi; Haruo Kobayashi 001; Fumitaka Abe; Kiichi Niitsu (J. Electron. Test., 2012)

CMOS Circuits to Measure Timing Jitter Using a Self-Referenced Clock and a Cascaded Time Difference Amplifier With Duty-Cycle Compensation. - Kiichi Niitsu; Masato Sakurai; Naohiro Harigai; Takahiro J. Yamaguchi; Haruo Kobayashi 001 (IEEE J. Solid State Circuits, 2012)

Design of a clock jitter reduction circuit using gated phase blending between self-delayed clock edges. - Kiichi Niitsu; Naohiro Harigai; Daiki Hirabayashi; Daiki Oki; Masato Sakurai; Osamu Kobayashi; Takahiro J. Yamaguchi; Haruo Kobayashi 001 (ASP-DAC, 2013)

An Analysis of Stochastic Self-Calibration of TDC Using Two Ring Oscillators. - Kentaroh Katoh; Yuta Doi; Satoshi Ito; Haruo Kobayashi 001; Ensi Li; Nobukazu Takai (Asian Test Symposium, 2013)

Digital Compensation for Timing Mismatches in Interleaved ADCs. - Ru Yi; Minghui Wu 008; Koji Asami; Haruo Kobayashi 001; Ramin Khatami; Atsuhiro Katayama; Isao Shimizu; Kentaroh Katoh (Asian Test Symposium, 2013)

Multi-bit Sigma-Delta TDC Architecture with Improved Linearity. - Satoshi Uemori; Masamichi Ishii; Haruo Kobayashi 001; Daiki Hirabayashi; Yuta Arakawa; Yuta Doi; Osamu Kobayashi; Tatsuji Matsuura; Kiichi Niitsu; Yuji Yano; Tatsuhiro Gake; Takahiro J. Yamaguchi; et al. (J. Electron. Test., 2013)

Design methodology for determining the number of stages in a cascaded time amplifier to minimize area consumption. - Kiichi Niitsu; Naohiro Harigai; Haruo Kobayashi 001 (IEICE Electron. Express, 2013)

Two-Tone Signal Generation for ADC Testing. - Keisuke Kato; Fumitaka Abe; Kazuyuki Wakabayashi; Chuan Gao; Takafumi Yamada; Haruo Kobayashi 001; Osamu Kobayashi; Kiichi Niitsu (IEICE Trans. Electron., 2013)

A Feed-Forward Time Amplifier Using a Phase Detector and Variable Delay Lines. - Kiichi Niitsu; Naohiro Harigai; Takahiro J. Yamaguchi; Haruo Kobayashi 001 (IEICE Trans. Electron., 2013)

Low-distortion signal generation for ADC testing. - Fumitaka Abe; Yutaro Kobayashi; Kenji Sawada; Keisuke Kato; Osamu Kobayashi; Haruo Kobayashi 001 (ITC, 2014)

A Small Chip Area Stochastic Calibration for TDC Using Ring Oscillator. - Kentaroh Katoh; Yutaro Kobayashi; Takeshi Chujo; Junshan Wang; Ensi Li; Congbing Li; Haruo Kobayashi 001 (J. Electron. Test., 2014)

Analog/mixed-signal circuit design in nano CMOS era. - Haruo Kobayashi 001; Hitoshi Aoki; Kentaroh Katoh; Congbing Li (IEICE Electron. Express, 2014)

A low-offset cascaded time amplifier with reconfigurable inter-stage connection. - Kiichi Niitsu; Naohiro Harigai; Takahiro J. Yamaguchi; Haruo Kobayashi 001 (IEICE Electron. Express, 2014)

Fibonacci sequence weighted SAR ADC algorithm and its DAC topology. - Takuya Arafune; Yutaro Kobayashi; Shohei Shibuya; Haruo Kobayashi 001 (ASICON, 2015)

Finite aperture time effects in sampling circuit. - Miho Arai; Isao Shimizu; Haruo Kobayashi 001; Keita Kurihara; Shu Sasaki; Shohei Shibuya; Kiichi Niitsu; Kazuyoshi Kubo (ASICON, 2015)

Study on maximum electric field modeling used for HCI induced degradation characteristic of LDMOS transistors. - Masashi Higashino; Hitoshi Aoki; Nobukazu Tsukiji; Masaki Kazumi; Takuya Totsuka; Haruo Kobayashi 001 (ASICON, 2015)

Selectable notch frequencies of EMI spread spectrum using pulse modulation in switching converter. - Yasunori Kobori; Takuya Arafune; Nobukazu Tsukiji; Nobukazu Takai; Haruo Kobayashi 001 (ASICON, 2015)

EMI reduction by analog noise spread spectrum in new ripple controlled converter. - Yasunori Kobori; Taifeng Wang; Nobukazu Tsukiji; Nobukazu Takai; Haruo Kobayashi 001 (ASICON, 2015)

Linearity enhancement algorithms for I-Q signal generation - DWA and self-calibration techniques. - Masahiro Murakami; Haruo Kobayashi 001; Shaiful Nizam Bin Mohyar; Takahiro Miki; Osamu Kobayashi (ASICON, 2015)

Flat passband gain design algorithm for 2nd-order RC polyphase filter. - Yoshiki Niki; Shu Sasaki; Nobu Yamaguchi; Jian Kang; Takashi Kitahara; Haruo Kobayashi 001 (ASICON, 2015)

High-frequency low-distortion signal generation algorithm with arbitrary waveform generator. - Shohei Shibuya; Yutaro Kobayashi; Haruo Kobayashi 001 (ASICON, 2015)

Automatic design of doubly-terminated RC polyphase filters by using distributed genetic algorithm. - Yoshiki Sugawara; Nobukazu Takai; Masato Kato; Hiroaki Seki; Kento Suzuki; Haruo Kobayashi 001 (ASICON, 2015)

High efficiency single-inductor dual-output DC-DC converter with ZVS-PWM control. - Yoshiki Sunaga; Naoya Shiraishi; Koyo Asaishi; Nobukazu Tsukiji; Yasunori Kobori; Nobukazu Takai; Haruo Kobayashi 001 (ASICON, 2015)

Comparator circuits automation by combination of distributed genetic algorithm and HSPICE optimization. - Kento Suzuki; Nobukazu Takai; Masato Kato; Hiroaki Seki; Yoshiki Sugawara; Haruo Kobayashi 001 (ASICON, 2015)

A study on HCI induced gate leakage current model used for reliability simulations in 90nm n-MOSFETs. - Nobukazu Tsukiji; Hitoshi Aoki; Masaki Kazumi; Takuya Totsuka; Masashi Higashino; Haruo Kobayashi 001 (ASICON, 2015)

SAR ADC design using Golden ratio weight algorithm. - Yutaro Kobayashi; Shohei Shibuya; Takuya Arafune; Shu Sasaki; Haruo Kobayashi 001 (ISCIT, 2015)

Erratum to: A Small Chip Area Stochastic Calibration for TDC Using Ring Oscillator. - Kentaroh Katoh; Yutaro Kobayashi; Takeshi Chujo; Junshan Wang; Ensi Li; Congbing Li; Haruo Kobayashi 001 (J. Electron. Test., 2015)

Transient Response Improvement of DC-DC Buck Converter by a Slope Adjustable Triangular Wave Generator. - Shu Wu; Yasunori Kobori; Nobukazu Tsukiji; Haruo Kobayashi 001 (IEICE Trans. Commun., 2015)

A CMOS PWM Transceiver Using Self-Referenced Edge Detection. - Kiichi Niitsu; Yusuke Osawa; Naohiro Harigai; Daiki Hirabayashi; Osamu Kobayashi; Takahiro J. Yamaguchi; Haruo Kobayashi 001 (IEEE Trans. Very Large Scale Integr. Syst., 2015)

Rectangular Waveform Generation with Harmonics Suppression. - Masayuki Kawabata; Koji Asami; Shohei Shibuya; Tomonori Yanagida; Haruo Kobayashi 001 (ATS, 2016)

I-Q signal generation techniques for communication IC testing and ATE systems. - Masahiro Murakami; Haruo Kobayashi 001; Shaiful Nizam Bin Mohyar; Osamu Kobayashi; Takahiro Miki; Junya Kojima (ITC, 2016)

Fundamental design tradeoff and performance limitation of electronic circuits based on uncertainty relationships. - Haruo Kobayashi 001; Isao Shimizu; Nobukazu Tsukiji; Miho Arai; Kazuyoshi Kubo; Hitoshi Aoki (ASICON, 2017)

SAR TDC Architecture with Self-Calibration Employing Trigger Circuit. - Yuki Ozawa; Takashi Ida; Richen Jiang; Shotaro Sakurai; Seiya Takigami; Nobukazu Tsukiji; Ryoji Shiota; Haruo Kobayashi 001 (ATS, 2017)

Fibonacci sequence weighted SAR ADC as golden section search. - Hirotaka Arai; Takuya Arafune; Shohei Shibuya; Yutaro Kobayashi; Koji Asami; Haruo Kobayashi 001 (ISPACS, 2017)

Delay-time suppression technique for DC/DC buck converter using voltage mode PWM control. - Manimel Wadu Sahan Dulara; Nobukazu Tsukiji; Yasunori Kobori; Koyo Asaishi; Nobukazu Takai; Haruo Kobayashi 001 (ISPACS, 2017)

Architecture of high performance successive approximation time digitizer. - Takashi Ida; Yuki Ozawa; Jiang Richen; Shotaro Sakurai; Seiya Takigami; Nobukazu Tsukiji; Hirotaka Arai; Ryoji Shiota; Haruo Kobayashi 001 (ISPACS, 2017)

Gray-code input DAC architecture for clean signal generation. - Richen Jiang; Gopal Adhikari; Yifei Sun 001; Dan Yao; Rino Takahashi; Yuki Ozawa; Nobukazu Tsukiji; Haruo Kobayashi 001; Ryoji Shiota (ISPACS, 2017)

Noise spread spectrum with adjustable notch frequency in complex pulse coding controlled DC-DC converters. - Yasunori Kobori; Nobukazu Tsukiji; Takuya Arafune; Manimel Wadu Sahan; Dulara Yifei Sun; Nobukazu Takai; Haruo Kobayashi 001 (ISPACS, 2017)

Study of jitter generators for high-speed I/O interface jitter tolerance testing. - Yuki Ozawa; Takuya Arafune; Nobukazu Tsukiji; Haruo Kobayashi 001; Ryoji Shiota (ISPACS, 2017)

SAR TDC architecture for one-shot timing measurement with full digital implementation. - Yuki Ozawa; Takashi Ida; Shotaro Sakurai; Richen Jiang; Rino Takahashi; Haruo Kobayashi 001; Ryoji Shiota (ISPACS, 2017)

Study of multistage digital oscilloscope trigger circuit. - Shotaro Sakurai; Seiya Takigami; Takashi Ida; Yuki Ozawa; Nobukazu Tsukiji; Yasunori Kobori; Haruo Kobayashi 001; Ryoji Shiota (ISPACS, 2017)

Estimation of circuit component values in buck converter using efficiency curve. - Shotaro Sakurai; Nobukazu Tsukiji; Yasunori Kobori; Haruo Kobayashi 001 (ISPACS, 2017)

Equivalence between Nyquist and Routh-Hurwitz stability criteria for operational amplifier design. - Jianlong Wang; Gopal Adhikari; Nobukazu Tsukiji; Mayu Hirano; Haruo Kobayashi 001; Keita Kurihara; Akihito Nagahama; Ippei Noda; Kohji Yoshii (ISPACS, 2017)

Constant on-time controlled four-phase buck converter via two ways of saw-tooth-wave circuit and PLL circuit. - Yi Xiong; Koyo Asaishi; Natsuko Milli; Yifei Sun 001; Nobukazu Tsukiji; Yasunori Kobori; Haruo Kobayashi 001 (ISPACS, 2017)

Two-phase soft-switching DC-DC converter with voltage-mode resonant switch. - Yi Xiong; Yifei Sun 001; Nobukazu Tsukiji; Yasunori Kobori; Haruo Kobayashi 001 (ISPACS, 2017)

DAC linearity improvement with layout technique using magic and latin squares. - Dan Yao; Yifei Sun 001; Masashi Higashino; Shaiful Nizam Bin Mohyar; Tomonori Yanagida; Takuya Arafune; Nobukazu Tsukiji; Haruo Kobayashi 001 (ISPACS, 2017)

Low-distortion signal generation for analog/mixed-signal circuit testing with digital ATE. - Masayuki Kawabata; Koji Asami; Shohei Shibuya; Tomonori Yanagida; Haruo Kobayashi 001 (ITC-Asia, 2017)

A technique for dynamic range improvement of intermodulation distortion products for an Interpolating DAC-based Arbitrary Waveform Generator using a phase switching algorithm. - Peter Sarson; Shohei Shibuya; Tomonori Yanagida; Haruo Kobayashi 001 (VTS, 2017)

Using Distortion Shaping Technique to Equalize ADC THD Performance Between ATEs. - Peter Sarson; Haruo Kobayashi 001 (J. Electron. Test., 2017)

Time-to-Digital Converter Architectures Using Two Oscillators with Different Frequencies. - Kosuke Machida; Uni Ozawa; Yudai Abe; Haruo Kobayashi 001 (ATS, 2018)

Highly Efficient Waveform Acquisition Condition in Equivalent-Time Sampling System. - Yuto Sasaki; Yujie Zhao; Anna Kuwana; Haruo Kobayashi 001 (ATS, 2018)

Low-Distortion One-Tone and Two-Tone Signal Generation Using AWG Over Full Nyquist Region. - Tomonori Yanagida; Shohei Shibuya; Kosuke Machida; Koji Asami; Haruo Kobayashi 001 (ITC-Asia, 2018)

Innovative practices on test in Japan. - Koji Asami; Yoshiro Tamura; Haruo Kobayashi 001; Jun Matsushima; Yoichi Maeda; Kazumi Hatayama (VTS, 2018)

A Distortion Shaping Technique to Equalize Intermodulation Distortion Performance of Interpolating Arbitrary Waveform Generators in Automated Test Equipment. - Peter Sarson; Tomonori Yanagida; Shohei Shibuya; Kosuke Machida; Haruo Kobayashi 001 (J. Electron. Test., 2018)

A Study on Loop Gain Measurement Method Using Output Impedance in DC-DC Buck Converter. - Nobukazu Tsukiji; Yasunori Kobori; Haruo Kobayashi 001 (IEICE Trans. Commun., 2018)

Frequency Estimation Sampling Circuit Using Analog Hilbert Filter and Residue Number System. - Yudai Abe; Shogo Katayama; Congbing Li; Anna Kuwana; Haruo Kobayashi 001 (ASICON, 2019)

Evaluation of Null Method for Operational Amplifier Short-Time Testing. - Riho Aoki; Keno Sato; Takashi Ishida 003; Toshiyuki Okamoto; Tamotsu Ichikawa; Shogo Katayama; Yuto Sasaki; Kosuke Machida; Takayuki Nakatani; Jianlong Wang; Anna Kuwana; Kazumi Hatayama; et al. (ASICON, 2019)

Analysis and Evaluation Method of RC Polyphase Filter. - Koji Asami; Nene Kushita; Akemi Hatta; Minh Tri Tran 001; Yoshiro Tamura; Anna Kuwana; Haruo Kobayashi 001 (ASICON, 2019)

Systematic Construction of Resistor Ladder Network for N-ary DACs. - Manato Hirai; Shuhei Yamamoto; Hirotaka Arai; Anna Kuwana; Hiroshi Tanimoto; Yuji Gendai; Haruo Kobayashi 001 (ASICON, 2019)

Automatic Correction of Current Imbalance for Multi-Phase COT Ripple-Based Control DC-DC Converter. - Shogo Katayama; Jing Li; Yifei Sun 001; Minh Tri Tran 001; Yasunori Kobori; Anna Kuwana; Haruo Kobayashi 001 (ASICON, 2019)

Output Voltage Ripple Reduction with Nosie Spread Spectrum for Dual-Phase LLC Resonant Converter. - Shogo Katayama; Noriyuki Oiwa; Yasunori Kobori; Anna Kuwana; Haruo Kobayashi 001 (ASICON, 2019)

Analog / Mixed-Signal / RF Circuits for Complex Signal Processing. - Haruo Kobayashi 001; Nene Kushita; Minh Tri Tran 001; Koji Asami; Hao San; Anna Kuwana; Akemi Hatta (ASICON, 2019)

Fine Time Resolution TDC Architectures -Integral and Delta-Sigma Types. - Haruo Kobayashi 001; Kosuke Machida; Yuto Sasaki; Yusuke Osawa; Pengfei Zhang; Lei Sha; Yuki Ozawa; Anna Kuwana (ASICON, 2019)

Optimization of High Reliability and Wide SOA 100 V LDMOS Transistor with Low Specific On-Resistance. - Anna Kuwana; Jun-Ichi Matsuda; Haruo Kobayashi 001 (ASICON, 2019)

Pulse Coding Control Switching Converter with Adjustable Conversion Voltage Ratio Notch Frequency Generation in Noise Spectrum. - Yifei Sun 001; Minh Tri Tran 001; Yasunori Kobori; Anna Kuwana; Haruo Kobayashi 001 (ASICON, 2019)

EMI Noise Reduction and Output Ripple Cancellation for Full-Wave Type Soft-Switching Converter. - Yifei Sun 001; Minh Tri Tran 001; Yasunori Kobori; Anna Kuwana; Haruo Kobayashi 001 (ASICON, 2019)

Flat Pass-Band Method with Two RC Band-Stop Filters for 4-Stage Passive RC Polyphase Filter in Low-IF Receiver Systems. - Minh Tri Tran 001; Nene Kushita; Anna Kuwana; Haruo Kobayashi 001 (ASICON, 2019)

Overshoot Cancelation Based on Balanced Charge-Discharge Time Condition for Buck Converter in Mobile Applications. - Minh Tri Tran 001; Yifei Sun 001; Yasunori Kobori; Anna Kuwana; Haruo Kobayashi 001 (ASICON, 2019)

Minimum Output Ripple and Fixed Operating Frequency Based on Modulation Injection for COT Ripple Control Converter. - Minh Tri Tran 001; Yifei Sun 001; Yasunori Kobori; Anna Kuwana; Haruo Kobayashi 001 (ASICON, 2019)

Graphene Biosensor for Saliva Protein Adsorption. - Shiyu Wang; Md. Zakir Hossain; Takaaki Suzuki; Kazuo Shinozuka; Natsuhiko Shimizu; Shunya Kitada; Ryo Ichige; Anna Kuwana; Haruo Kobayashi 001 (ASICON, 2019)

High-Resolution Low-Sampling-Rate Δ∑ ADC Linearity Short-Time Testing Algorithm. - Jiang-Lin Wei; Takashi Ishida 003; Toshiyuki Okamoto; Tamotsu Ichikawa; Nene Kushita; Takahiro Arai; Lei Sha; Anna Kuwana; Haruo Kobayashi 001; Takayuki Nakatani; Kazumi Hatayama; Keno Sato (ASICON, 2019)

Multi-Phase Full/Half Wave Type Resonant Converters with Automatic Current Balance against Element Variation. - Chen-Hao Zhang; Yifei Sun 001; Minh Tri Tran 001; Yasunori Kobori; Anna Kuwana; Haruo Kobayashi 001 (ASICON, 2019)

Accurate and Fast Testing Technique of Operational Amplifier DC Offset Voltage in µV-Order by DC-AC Conversion. - Yuto Sasaki; Kosuke Machida; Riho Aoki; Shogo Katayama; Takayuki Nakatani; Jianlong Wang; Keno Sato; Takashi Ishida 003; Toshiyuki Okamoto; Tamotsu Ichikawa; Anna Kuwana; Kazumi Hatayama; et al. (ITC-Asia, 2019)

Crest Factor Controlled Multi-Tone Signals for Analog/Mixed-Signal IC Testing. - Yukiko Shibasaki; Koji Asami; Anna Kuwana; Kosuke Machida; Yuanyang Du; Akemi Hatta; Kazuyoshi Kubo; Haruo Kobayashi 001 (ITC-Asia, 2019)

Innovative Test Practices in Japan. - Yusuke Asada; Takahiko Shimizu; Yuji Gendai; Keno Sato; Takashi Ishida 003; Toshiyuki Okamoto; Tamotsu Ichikawa; Jiang-Lin Wei; Nene Kushita; Hirotaka Arai; Anna Kuwana; Takayuki Nakatani; et al. (VTS, 2019)

Design and theoretical analysis of a clock jitter reduction circuit using gated phase blending between self-delayed clock edges. - Kiichi Niitsu; Osamu Kobayashi; Takahiro J. Yamaguchi; Haruo Kobayashi 001 (IEICE Electron. Express, 2019)

Revisit to Floating-Point Division Algorithm Based on Taylor-Series Expansion. - Jianglin Wei; Anna Kuwana; Haruo Kobayashi 001; Kazuyoshi Kubo (APCCAS, 2020)

Summing Node Test Method: Simultaneous Multiple AC Characteristics Testing of Multiple Operational Amplifiers. - Gaku Ogihara; Takayuki Nakatani; Akemi Hatta; Keno Sato; Takashi Ishida 003; Toshiyuki Okamoto; Tamotsu Ichikawa; Anna Kuwana; Riho Aoki; Shogo Katayama; Jianglin Wei; Yujie Zhao; et al. (ATS, 2020)

Accurate Testing of Precision Voltage Reference by DC-AC Conversion. - Keno Sato; Takayuki Nakatani; Takashi Ishida 003; Toshiyuki Okamoto; Tamotsu Ichikawa; Anna Kuwana; Kazumi Hatayama; Haruo Kobayashi 001 (ATS, 2020)

Analysis and Design of Multi-Tone Signal Generation Algorithms for Reducing Crest Factor. - Yukiko Shibasaki; Koji Asami; Riho Aoki; Akemi Hatta; Anna Kuwana; Haruo Kobayashi 001 (ATS, 2020)

Low Power Loss IGBT Driver Circuit Using Current Drive. - Yudai Abe; Akio Iwabuchi; Jun-Ichi Matsuda; Anna Kuwana; Takashi Ida; Yukiko Shibasaki; Haruo Kobayashi 001 (ISOCC, 2020)

Digital-to-Analog Converter Architectures Based on Polygonal and Prime Numbers. - Yuanyang Du; Xueyan Bai; Manato Hirai; Shuhei Yamamoto; Anna Kuwana; Haruo Kobayashi 001; Kazuyoshi Kubo (ISOCC, 2020)

Nonlinearity Analysis of Resistive Ladder-Based Current-Steering Digital-to-Analog Converter. - Manato Hirai; Hiroshi Tanimoto; Yuji Gendai; Shuhei Yamamoto; Anna Kuwana; Haruo Kobayashi 001 (ISOCC, 2020)

Improved Nagata Current Source Insensitive to Temperature and Power Supply Voltage. - Takashi Hosono; Lei Sha; Souma Yamamoto; Mayu Hirano; Takashi Ida; Anna Kuwana; Haruo Kobayashi 001; Yoichi Moroshima; Hiromichi Harakawa; Takeshi Oikawa (ISOCC, 2020)

Simple Reference Voltage Generation Circuit Insensitive to Temperature. - Lei Sha; Anna Kuwana; Masashi Horiguchi; Haruo Kobayashi 001 (ISOCC, 2020)

Study on Crest Factor Controlled Multi-Tone Signal for Analog RF Circuit Testing. - Yukiko Shibasaki; Koji Asami; Akemi Hatta; Riho Aoki; Anna Kuwana; Haruo Kobayashi 001 (ISOCC, 2020)

Operation and Stability Analysis of Temperature-Insensitive MOS Reference Current Source with Self-Bias Circuit. - Souma Yamamoto; Kuswan Isam Ebisawa; Yudai Abe; Takashi Ida; Yukiko Shibasaki; Nobukazu Tsukiji; Anna Kuwana; Haruo Kobayashi 001; Akira Suzuki; Yukichi Todoroki; Toshihiko Kakinoki; Nobuto Ono; et al. (ISOCC, 2020)

Ringing Test for Third-Order Ladder Low-Pass Filters. - Minh Tri Tran 001; Anna Kuwana; Haruo Kobayashi 001 (UEMCON, 2020)

Innovative Test Practices in Asia. - Takeshi Iwasaki; Masao Aso; Haruji Futami; Satoshi Matsunaga; Yousuke Miyake; Takaaki Kato; Seiji Kajihara; Yukiya Miura; Smith Lai; Gavin Hung; Harry H. Chen; Haruo Kobayashi 001; et al. (VTS, 2020)

Activation Modeling and Classification of Voluntary and Imagery Movements From the Prefrontal fNIRS Signals. - Md. Asadur Rahman; Mohd Abdur Rashid; Mohiuddin Ahmad; Anna Kuwana; Haruo Kobayashi 001 (IEEE Access, 2020)

Pulse Coding Controlled Switching Converter that Generates Notch Frequency to Suit Noise Spectrum. - Yifei Sun 001; Yasunori Kobori; Anna Kuwana; Haruo Kobayashi 001 (IEICE Trans. Commun., 2020)

Study of Behaviors of Motion Models in High-Order Systems. - Minh Tri Tran 001; Anna Kuwana; Haruo Kobayashi 001 (AIIoT, 2021)

Classical Mathematics and Analog/Mixed-Signal IC Design. - Haruo Kobayashi 001; Xueyan Bai; Yujie Zhao; Shuhei Yamamoto; Dan Yao; Manato Hirai; Jianglin Wei; Shogo Katayama; Anna Kuwana (ASICON, 2021)

Adaptive Convergence Method of Notch Frequency in Noise Spread Spectrum for Pulse Coding Switching DC-DC Converter. - Gui-Yi Dong; Shogo Katayama; Yifei Sun 001; Yasunori Kobori; Anna Kuwana; Haruo Kobayashi 001 (ASICON, 2021)

Analysis of Switching Characteristics of Wide SOA and High Reliability 100 V N-LDMOS Transistor with Dual RESURF and Grounded Field Plate Structure. - Anna Kuwana; Jun-Ichi Matsuda; Haruo Kobayashi 001 (ASICON, 2021)

Multi-Output SEIPC Multiplied Boost Converter with Exclusive Control. - Yuki Sekine; Shogo Katayama; Yasunori Kobori; Anna Kuwana; Haruo Kobayashi 001 (ASICON, 2021)

Divide and Conquer: Floating-Point Exponential Calculation Based on Taylor-Series Expansion. - Jianglin Wei; Anna Kuwana; Haruo Kobayashi 001; Kazuyoshi Kubo (ASICON, 2021)

Application of Residue Sampling to RF/AMS Device Testing. - Shogo Katayama; Yudai Abe; Anna Kuwana; Koji Asami; Masahiro Ishida; Ryuya Ohta; Haruo Kobayashi 001 (ATS, 2021)

High Precision Measurement of Sub-Nano Ampere Current in ATE Environment. - Keno Sato; Takayuki Nakatani; Takashi Ishida 003; Toshiyuki Okamoto; Tamotsu Ichikawa; Shogo Katayama; Gaku Ogihara; Daisuke Iimori; Yujie Zhao; Jianglin Wei; Anna Kuwana; Kazumi Hatayama; et al. (ATS, 2021)

Study of Helix Functions and Multi-Source Rauch Filters. - Minh Tri Tran 001; Anna Kuwana; Haruo Kobayashi 001 (CCWC, 2021)

Study of Rauch Low-Pass Filters using Pascal's Triangle. - Minh Tri Tran 001; Anna Kuwana; Haruo Kobayashi 001 (ICEIC, 2021)

Evaluation of High-Precision Nano-Ampere Current Measurement Method for Mass Production. - Gaku Ogihara; Takayuki Nakatani; Daisuke Iimori; Shogo Katayama; Anna Kuwana; Keno Sato; Takashi Ishida 003; Toshiyuki Okamoto; Tamotsu Ichikawa; Yujie Zhao; Jianglin Wei; Kazumi Hatayama; et al. (ICECS, 2021)

Metallic Ratio Equivalent-Time Sampling: A Highly Efficient Waveform Acquisition Method. - Shuhei Yamamoto; Yuto Sasaki; Yujie Zhao; Jianglin Wei; Anna Kuwana; Keno Sato; Takashi Ishida 003; Toshiyuki Okamoto; Tamotsu Ichikawa; Takayuki Nakatani; Minh Tri Tran 001; Shogo Katayama; et al. (IOLTS, 2021)

Summing Node and False Summing Node Methods: Accurate Operational Amplifier AC Characteristics Testing without Audio Analyzer. - Daisuke Iimori; Takayuki Nakatani; Shogo Katayama; Gaku Ogihara; Akemi Hatta; Anna Kuwana; Keno Sato; Takashi Ishida 003; Toshiyuki Okamoto; Tamotsu Ichikawa; Jianglin Wei; Yujie Zhao; et al. (ITC, 2021)

Revisit to Accurate ADC Testing with Incoherent Sampling Using Proper Sinusoidal Signal and Sampling Frequencies. - Keno Sato; Takashi Ishida 003; Toshiyuki Okamoto; Tamotsu Ichikawa; Jianglin Wei; Takayuki Nakatani; Yujie Zhao; Shogo Katayama; Shuhei Yamamoto; Anna Kuwana; Kazumi Hatayama; Haruo Kobayashi 001 (ITC, 2021)

Investigation of Behaviours of Kerwin-Huelsman-Newcomb Filters Using Nichols Charts of Self-Loop Function. - Minh Tri Tran 001; Anna Kuwana; Haruo Kobayashi 001 (MWSCAS, 2021)

Floating-Point Square Root Calculation Algorithm Based on Taylor-Series Expansion and Region Division. - Jianglin Wei; Anna Kuwana; Haruo Kobayashi 001; Kazuyoshi Kubo; Yuuki Tanaka (MWSCAS, 2021)

Floating-Point Inverse Square Root Algorithm Based on Taylor-Series Expansion. - Jianglin Wei; Anna Kuwana; Haruo Kobayashi 001; Kazuyoshi Kubo; Yuuki Tanaka (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

High Precision Voltage Measurement System Utilizing Low-End ATE Resource and BOST. - Keno Sato; Takayuki Nakatani; Shogo Katayama; Daisuke Iimori; Gaku Ogihara; Takashi Ishida 003; Toshiyuki Okamoto; Tamotsu Ichikawa; Yujie Zhao; Kentaroh Katoh; Anna Kuwana; Kazumi Hatayama; et al. (ATS, 2022)

Notch Frequency Generation Methods in Noise Spread Spectrum for Pulse Coding Switching DC-DC Converter. - Gui-Yi Dong; Shogo Katayama; Yifei Sun 001; Yasunori Kobori; Anna Kuwana; Haruo Kobayashi 001 (LASCAS, 2022)

Low Switching Loss Dual RESURF 40 V N-LDMOS with Grounded Field Plate for DC-DC Converters. - Hao Yang Du; Jun-Ichi Matsuda; Anna Kuwana; Haruo Kobayashi 001 (MWSCAS, 2022)

Innovative Practices Track: Innovative Analog Circuit Testing Technologies. - Chris Mangelsdorf; Manasa Madhvaraj; Salvador Mir; Manuel J. Barragán; Daisuke Iimori; Takayuki Nakatani; Shogo Katayama; Gaku Ogihara; Yujie Zhao; Jianglin Wei; Anna Kuwana; Kentaroh Katoh; et al. (VTS, 2022)

Revisit to Histogram Method for ADC Linearity Test: Examination of Input Signal and Ratio of Input and Sampling Frequencies. - Yujie Zhao; Kentaroh Katoh; Anna Kuwana; Shogo Katayama; Jianglin Wei; Haruo Kobayashi 001; Takayuki Nakatani; Kazumi Hatayama; Keno Sato; Takashi Ishida 003; Toshiyuki Okamoto; Tamotsu Ichikawa (J. Electron. Test., 2022)

Asynchronous capacitive SAR ADC based on Hopfield network. - Xueyan Bai; Shogo Katayama; Dan Yao; Anna Kuwana; Zifei Xu; Haruo Kobayashi 001 (IEICE Electron. Express, 2022)

Unit cell mismatch scrambling method for high-resolution unary DAC based on virtual 3D layout. - Dan Yao; Xuanyan Bai; Shogo Katayama; Anna Kuwana; Kazuyuki Kawauchi; Haruo Kobayashi 001; Kouji Hirai; Akira Suzuki; Satoshi Yamada; Tomoyuki Kato; Ritsuko Kitakoga; Takeshi Shimamura; et al. (IEICE Electron. Express, 2022)

IEEE754 Binary32 Floating-Point Logarithmic Algorithms Based on Taylor-Series Expansion with Mantissa Region Conversion and Division. - Jianglin Wei; Anna Kuwana; Haruo Kobayashi 001; Kazuyoshi Kubo (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2022)

Signal Generation Technologies for Analog/Mixed-Signal IC Testing. - Haruo Kobayashi 001 (ASICON, 2023)

Back to the Analog Neural Network and Linear Circuit Theory. - Haruo Kobayashi 001; Manato Hirai; Kakeru Otomo; Shogo Katayama; Xueyan Bai; Masashi Chiba; Zifei Xu; Dan Yao; Lengkhang Nengvang; Minh Tri Tran 001; Kanji Yoshihiro; Anna Kuwana; et al. (ASICON, 2023)

A Physically Unclonable Function Using Time-to-Digital Converter with Linearity Self-Calibration and its FPGA Implementation. - Kentaroh Katoh; Shuhei Yamamoto; Zheming Zhao; Yujie Zhao; Shogo Katayama; Anna Kuwana; Takayuki Nakatani; Kazumi Hatayama; Haruo Kobayashi 001; Keno Sato; Takashi Ishida 003; Toshiyuki Okamoto; et al. (ITC-Asia, 2023)

Low Distortion Sinusoidal Signal Generator with Harmonics Cancellation Using Two Types of Digital Predistortion. - Keno Sato; Takayuki Nakatani; Takashi Ishida 003; Toshiyuki Okamoto; Tamotsu Ichikawa; Shogo Katayama; Daisuke Iimori; Misaki Takagi; Yujie Zhao; Shuhei Yamamoto; Anna Kuwana; Kentaroh Katoh; et al. (ITC, 2023)

Low distortion sine wave generator with simple harmonics cancellation circuit and filter for analog device testing. - Shogo Katayama; Takayuki Nakatani; Daisuke Iimori; Misaki Takagi; Yujie Zhao; Anna Kuwana; Keno Sato; Takashi Ishida 003; Toshiyuki Okamoto; Tamotsu Ichikawa; Kentaroh Katoh; Kazumi Hatayama; et al. (IEICE Electron. Express, 2023)

Relaxation DAC with positive and negative polarity output using high-pass filter. - Lengkhang Nengvang; Shogo Katayama; Anna Kuwana; Kazufumi Naganuma; Kiyoshi Sasai; Akihisa Iikura; Akira Asao; Takuya Watanabe; Katsuaki Morishita; Haruo Kobayashi 001 (IEICE Electron. Express, 2023)

Asynchronous SAR ADC with Parallel Comparators Inspired by Hopfield Network. - Keita Noda; Hao San; Xueyan Bai; Shogo Katayama; Dan Yao; Anna Kuwana; Zifei Xu; Haruo Kobayashi 001 (ISPACS, 2024)

Bit-Serial DAC With Positive and Negative Polarity Output Using Switched Capacitor Circuit. - Nobukazu Tsukiji; Eito Minami; Lengkhang Nengvang; Jianglin Wei; Shogo Katayama; Anna Kuwana; Haruo Kobayashi 001 (ISPACS, 2024)

Innovative Practices Session at VLSI Test Symposium 2024: Analog Testing Technologies for Digital Exploding Society. - Haruo Kobayashi 001; Naoki Tsukahara; Keno Sato; Takashi Oshima (VTS, 2024)

How the Author's Group Came Up with Ideas in Analog/Mixed-Signal Circuit and System Area. - Haruo Kobayashi 001 (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2024)

A 10ps-Order Flexible Resolution Time-to-Digital Converter with Linearity Calibration and Legacy FPGA. - Kentaroh Katoh; Toru Nakura; Haruo Kobayashi 001 (DATE, 2025)