Haruo Kobayashi
Orcid: 0000-0002-0990-5522Affiliations:
- Gunma University, Japan
According to our database1,
Haruo Kobayashi
authored at least 184 papers
between 1992 and 2023.
Collaborative distances:
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on orcid.org
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Bibliography
2023
IEICE Electron. Express, 2023
Low distortion sine wave generator with simple harmonics cancellation circuit and filter for analog device testing.
IEICE Electron. Express, 2023
Low Distortion Sinusoidal Signal Generator with Harmonics Cancellation Using Two Types of Digital Predistortion.
Proceedings of the IEEE International Test Conference, 2023
A Physically Unclonable Function Using Time-to-Digital Converter with Linearity Self-Calibration and its FPGA Implementation.
Proceedings of the IEEE International Test Conference in Asia, 2023
Proceedings of the 15th IEEE International Conference on ASIC, 2023
Proceedings of the 15th IEEE International Conference on ASIC, 2023
2022
IEEE754 Binary32 Floating-Point Logarithmic Algorithms Based on Taylor-Series Expansion with Mantissa Region Conversion and Division.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2022
Unit cell mismatch scrambling method for high-resolution unary DAC based on virtual 3D layout.
IEICE Electron. Express, 2022
IEICE Electron. Express, 2022
Revisit to Histogram Method for ADC Linearity Test: Examination of Input Signal and Ratio of Input and Sampling Frequencies.
J. Electron. Test., 2022
Proceedings of the 40th IEEE VLSI Test Symposium, 2022
Low Switching Loss Dual RESURF 40 V N-LDMOS with Grounded Field Plate for DC-DC Converters.
Proceedings of the 65th IEEE International Midwest Symposium on Circuits and Systems, 2022
Notch Frequency Generation Methods in Noise Spread Spectrum for Pulse Coding Switching DC-DC Converter.
Proceedings of the 13th IEEE Latin America Symposium on Circuits and System, 2022
Proceedings of the IEEE 31st Asian Test Symposium, 2022
2021
IEEE Trans. Circuits Syst. II Express Briefs, 2021
Floating-Point Square Root Calculation Algorithm Based on Taylor-Series Expansion and Region Division.
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021
Investigation of Behaviours of Kerwin-Huelsman-Newcomb Filters Using Nichols Charts of Self-Loop Function.
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021
Revisit to Accurate ADC Testing with Incoherent Sampling Using Proper Sinusoidal Signal and Sampling Frequencies.
Proceedings of the IEEE International Test Conference, 2021
Summing Node and False Summing Node Methods: Accurate Operational Amplifier AC Characteristics Testing without Audio Analyzer.
Proceedings of the IEEE International Test Conference, 2021
Metallic Ratio Equivalent-Time Sampling: A Highly Efficient Waveform Acquisition Method.
Proceedings of the 27th IEEE International Symposium on On-Line Testing and Robust System Design, 2021
Evaluation of High-Precision Nano-Ampere Current Measurement Method for Mass Production.
Proceedings of the 28th IEEE International Conference on Electronics, 2021
Proceedings of the International Conference on Electronics, Information, and Communication, 2021
Proceedings of the 11th IEEE Annual Computing and Communication Workshop and Conference, 2021
Proceedings of the 30th IEEE Asian Test Symposium, 2021
Proceedings of the 30th IEEE Asian Test Symposium, 2021
Divide and Conquer: Floating-Point Exponential Calculation Based on Taylor-Series Expansion.
Proceedings of the 14th IEEE International Conference on ASIC, 2021
Proceedings of the 14th IEEE International Conference on ASIC, 2021
Analysis of Switching Characteristics of Wide SOA and High Reliability 100 V N-LDMOS Transistor with Dual RESURF and Grounded Field Plate Structure.
Proceedings of the 14th IEEE International Conference on ASIC, 2021
Adaptive Convergence Method of Notch Frequency in Noise Spread Spectrum for Pulse Coding Switching DC-DC Converter.
Proceedings of the 14th IEEE International Conference on ASIC, 2021
Proceedings of the 14th IEEE International Conference on ASIC, 2021
Proceedings of the IEEE World AI IoT Congress, 2021
2020
Pulse Coding Controlled Switching Converter that Generates Notch Frequency to Suit Noise Spectrum.
IEICE Trans. Commun., 2020
Activation Modeling and Classification of Voluntary and Imagery Movements From the Prefrontal fNIRS Signals.
IEEE Access, 2020
Proceedings of the 38th IEEE VLSI Test Symposium, 2020
Proceedings of the 11th IEEE Annual Ubiquitous Computing, 2020
Operation and Stability Analysis of Temperature-Insensitive MOS Reference Current Source with Self-Bias Circuit.
Proceedings of the International SoC Design Conference, 2020
Proceedings of the International SoC Design Conference, 2020
Proceedings of the International SoC Design Conference, 2020
Proceedings of the International SoC Design Conference, 2020
Nonlinearity Analysis of Resistive Ladder-Based Current-Steering Digital-to-Analog Converter.
Proceedings of the International SoC Design Conference, 2020
Proceedings of the International SoC Design Conference, 2020
Proceedings of the International SoC Design Conference, 2020
Analysis and Design of Multi-Tone Signal Generation Algorithms for Reducing Crest Factor.
Proceedings of the 29th IEEE Asian Test Symposium, 2020
Proceedings of the 29th IEEE Asian Test Symposium, 2020
Summing Node Test Method: Simultaneous Multiple AC Characteristics Testing of Multiple Operational Amplifiers.
Proceedings of the 29th IEEE Asian Test Symposium, 2020
Proceedings of the 2020 IEEE Asia Pacific Conference on Circuits and Systems, 2020
2019
Design and theoretical analysis of a clock jitter reduction circuit using gated phase blending between self-delayed clock edges.
IEICE Electron. Express, 2019
Proceedings of the 37th IEEE VLSI Test Symposium, 2019
Proceedings of the IEEE International Test Conference in Asia, 2019
Accurate and Fast Testing Technique of Operational Amplifier DC Offset Voltage in µV-Order by DC-AC Conversion.
Proceedings of the IEEE International Test Conference in Asia, 2019
Multi-Phase Full/Half Wave Type Resonant Converters with Automatic Current Balance against Element Variation.
Proceedings of the 13th IEEE International Conference on ASIC, 2019
Proceedings of the 13th IEEE International Conference on ASIC, 2019
Proceedings of the 13th IEEE International Conference on ASIC, 2019
Minimum Output Ripple and Fixed Operating Frequency Based on Modulation Injection for COT Ripple Control Converter.
Proceedings of the 13th IEEE International Conference on ASIC, 2019
Overshoot Cancelation Based on Balanced Charge-Discharge Time Condition for Buck Converter in Mobile Applications.
Proceedings of the 13th IEEE International Conference on ASIC, 2019
Flat Pass-Band Method with Two RC Band-Stop Filters for 4-Stage Passive RC Polyphase Filter in Low-IF Receiver Systems.
Proceedings of the 13th IEEE International Conference on ASIC, 2019
EMI Noise Reduction and Output Ripple Cancellation for Full-Wave Type Soft-Switching Converter.
Proceedings of the 13th IEEE International Conference on ASIC, 2019
Pulse Coding Control Switching Converter with Adjustable Conversion Voltage Ratio Notch Frequency Generation in Noise Spectrum.
Proceedings of the 13th IEEE International Conference on ASIC, 2019
Optimization of High Reliability and Wide SOA 100 V LDMOS Transistor with Low Specific On-Resistance.
Proceedings of the 13th IEEE International Conference on ASIC, 2019
Proceedings of the 13th IEEE International Conference on ASIC, 2019
Proceedings of the 13th IEEE International Conference on ASIC, 2019
Output Voltage Ripple Reduction with Nosie Spread Spectrum for Dual-Phase LLC Resonant Converter.
Proceedings of the 13th IEEE International Conference on ASIC, 2019
Automatic Correction of Current Imbalance for Multi-Phase COT Ripple-Based Control DC-DC Converter.
Proceedings of the 13th IEEE International Conference on ASIC, 2019
Proceedings of the 13th IEEE International Conference on ASIC, 2019
Proceedings of the 13th IEEE International Conference on ASIC, 2019
Proceedings of the 13th IEEE International Conference on ASIC, 2019
Frequency Estimation Sampling Circuit Using Analog Hilbert Filter and Residue Number System.
Proceedings of the 13th IEEE International Conference on ASIC, 2019
2018
A Study on Loop Gain Measurement Method Using Output Impedance in DC-DC Buck Converter.
IEICE Trans. Commun., 2018
A Distortion Shaping Technique to Equalize Intermodulation Distortion Performance of Interpolating Arbitrary Waveform Generators in Automated Test Equipment.
J. Electron. Test., 2018
Proceedings of the 36th IEEE VLSI Test Symposium, 2018
Low-Distortion One-Tone and Two-Tone Signal Generation Using AWG Over Full Nyquist Region.
Proceedings of the IEEE International Test Conference in Asia, 2018
Proceedings of the 27th IEEE Asian Test Symposium, 2018
Time-to-Digital Converter Architectures Using Two Oscillators with Different Frequencies.
Proceedings of the 27th IEEE Asian Test Symposium, 2018
2017
J. Electron. Test., 2017
A technique for dynamic range improvement of intermodulation distortion products for an Interpolating DAC-based Arbitrary Waveform Generator using a phase switching algorithm.
Proceedings of the 35th IEEE VLSI Test Symposium, 2017
Low-distortion signal generation for analog/mixed-signal circuit testing with digital ATE.
Proceedings of the International Test Conference in Asia, 2017
Proceedings of the 2017 International Symposium on Intelligent Signal Processing and Communication Systems, 2017
Proceedings of the 2017 International Symposium on Intelligent Signal Processing and Communication Systems, 2017
Constant on-time controlled four-phase buck converter via two ways of saw-tooth-wave circuit and PLL circuit.
Proceedings of the 2017 International Symposium on Intelligent Signal Processing and Communication Systems, 2017
Equivalence between Nyquist and Routh-Hurwitz stability criteria for operational amplifier design.
Proceedings of the 2017 International Symposium on Intelligent Signal Processing and Communication Systems, 2017
Proceedings of the 2017 International Symposium on Intelligent Signal Processing and Communication Systems, 2017
Proceedings of the 2017 International Symposium on Intelligent Signal Processing and Communication Systems, 2017
SAR TDC architecture for one-shot timing measurement with full digital implementation.
Proceedings of the 2017 International Symposium on Intelligent Signal Processing and Communication Systems, 2017
Proceedings of the 2017 International Symposium on Intelligent Signal Processing and Communication Systems, 2017
Noise spread spectrum with adjustable notch frequency in complex pulse coding controlled DC-DC converters.
Proceedings of the 2017 International Symposium on Intelligent Signal Processing and Communication Systems, 2017
Proceedings of the 2017 International Symposium on Intelligent Signal Processing and Communication Systems, 2017
Proceedings of the 2017 International Symposium on Intelligent Signal Processing and Communication Systems, 2017
Delay-time suppression technique for DC/DC buck converter using voltage mode PWM control.
Proceedings of the 2017 International Symposium on Intelligent Signal Processing and Communication Systems, 2017
Proceedings of the 2017 International Symposium on Intelligent Signal Processing and Communication Systems, 2017
Proceedings of the 26th IEEE Asian Test Symposium, 2017
Fundamental design tradeoff and performance limitation of electronic circuits based on uncertainty relationships.
Proceedings of the 12th IEEE International Conference on ASIC, 2017
2016
Proceedings of the 2016 IEEE International Test Conference, 2016
Proceedings of the 25th IEEE Asian Test Symposium, 2016
2015
IEEE Trans. Very Large Scale Integr. Syst., 2015
Transient Response Improvement of DC-DC Buck Converter by a Slope Adjustable Triangular Wave Generator.
IEICE Trans. Commun., 2015
J. Electron. Test., 2015
Proceedings of the 15th International Symposium on Communications and Information Technologies, 2015
A study on HCI induced gate leakage current model used for reliability simulations in 90nm n-MOSFETs.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015
Comparator circuits automation by combination of distributed genetic algorithm and HSPICE optimization.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015
Automatic design of doubly-terminated RC polyphase filters by using distributed genetic algorithm.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015
High-frequency low-distortion signal generation algorithm with arbitrary waveform generator.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015
Linearity enhancement algorithms for I-Q signal generation - DWA and self-calibration techniques.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015
Selectable notch frequencies of EMI spread spectrum using pulse modulation in switching converter.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015
Study on maximum electric field modeling used for HCI induced degradation characteristic of LDMOS transistors.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015
2014
IEICE Electron. Express, 2014
J. Electron. Test., 2014
Proceedings of the 2014 International Test Conference, 2014
2013
IEICE Trans. Electron., 2013
Design methodology for determining the number of stages in a cascaded time amplifier to minimize area consumption.
IEICE Electron. Express, 2013
J. Electron. Test., 2013
Proceedings of the 22nd Asian Test Symposium, 2013
Proceedings of the 22nd Asian Test Symposium, 2013
Design of a clock jitter reduction circuit using gated phase blending between self-delayed clock edges.
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013
2012
CMOS Circuits to Measure Timing Jitter Using a Self-Referenced Clock and a Cascaded Time Difference Amplifier With Duty-Cycle Compensation.
IEEE J. Solid State Circuits, 2012
J. Electron. Test., 2012
A clock jitter reduction circuit using gated phase blending between self-delayed clock edges.
Proceedings of the Symposium on VLSI Circuits, 2012
Proceedings of the 21st IEEE Asian Test Symposium, 2012
Proceedings of the 21st IEEE Asian Test Symposium, 2012
Proceedings of the 21st IEEE Asian Test Symposium, 2012
A reference-free on-chip timing jitter measurement circuit using self-referenced clock and a cascaded time difference amplifier in 65nm CMOS.
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012
2011
IEICE Trans. Electron., 2011
IEICE Trans. Electron., 2011
Analysis of jitter accumulation in interleaved phase frequency detectors for high-accuracy on-chip jitter measurements.
Proceedings of the International SoC Design Conference, 2011
An on-chip timing jitter measurement circuit using a self-referenced clock and a cascaded time difference amplifier with duty-cycle compensation.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2011
2010
Noise-Coupled Image Rejection Architecture of Complex Bandpass DeltaSigmaAD Modulator.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2010
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2010
Timing skew compensation technique using digital filter with novel linear phase condition.
Proceedings of the 2011 IEEE International Test Conference, 2010
Background calibration algorithm for pipelined ADC with open-loop residue amplifier using split ADC structure.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010
2009
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009
Technique to Improve the Performance of Time-Interleaved A-D Converters with Mismatches of Non-linearity.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009
Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009
2008
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008
Technique to Improve the Performance of Time-Interleaved A-D Converters with Mismatches of Non-linearity.
Proceedings of the 17th IEEE Asian Test Symposium, 2008
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008
2007
Total Harmonic Distortion Measurement System of Electronic Devices up to 100 MHz With Remarkable Sensitivity.
IEEE Trans. Instrum. Meas., 2007
A Second-Order Multibit Complex Bandpass DeltaSigmaAD Modulator with I, Q Dynamic Matching and DWA Algorithm.
IEICE Trans. Electron., 2007
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007
2006
High-Speed Continuous-Time Subsampling Bandpass DeltaSigmaAD Modulator Architecture Employing Radio Frequency DAC.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006
Complex Bandpass DeltaSigmaAD Modulator Architecture without I, Q-Path Crossing Layout.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006
2005
Reducing Spurious Output of Balanced Modulators by Dynamic Matching of I, Q Quadrature Paths.
IEICE Trans. Electron., 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
2004
An Element Rotation Algorithm for Multi-bit DAC Nonlinearities in Complex Bandpass \Delta\SigmaAD Modulators.
Proceedings of the 17th International Conference on VLSI Design (VLSI Design 2004), 2004
2003
High-Efficiency Charge-Pump Circuits which Use a 0.5<i>V</i><sub>dd</sub>-Step Pumping Method.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003
2002
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002
Sampling Jitter and Finite Aperture Time Effects in Wideband Data Acquisition Systems.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002
2001
1999
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999
Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999
Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999
1998
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998
Spatial and temporal stability of vision chips including parasitic inductances and capacitances.
Proceedings of the 1998 IEEE International Conference on Acoustics, 1998
1995
IEEE Trans. Neural Networks, 1995
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995
1993
Neural Networks, 1993
1992
IEEE Trans. Neural Networks, 1992