A memory-based realization of a binarized deep convolutional neural network. - Hiroki Nakahara; Haruyoshi Yonekawa; Tsutomu Sasao; Hisashi Iwamoto; Masato Motomura (FPT, 2016)

A Batch Normalization Free Binarized Convolutional Deep Neural Network on an FPGA (Abstract Only). - Hiroki Nakahara; Haruyoshi Yonekawa; Hisashi Iwamoto; Masato Motomura (FPGA, 2017)

A demonstration of the GUINNESS: A GUI based neural NEtwork SyntheSizer for an FPGA. - Hiroyuki Nakahara; Haruyoshi Yonekawa; Tomoya Fujii; Masayuki Shimoda; Simpei Sato (FPL, 2017)

An object detector based on multiscale sliding window search using a fully pipelined binarized CNN on an FPGA. - Hiroki Nakahara; Haruyoshi Yonekawa; Shimpei Sato (FPT, 2017)

On-Chip Memory Based Binarized Convolutional Deep Neural Network Applying Batch Normalization Free Technique on an FPGA. - Haruyoshi Yonekawa; Hiroki Nakahara (IPDPS Workshops, 2017)

In-memory area-efficient signal streaming processor design for binary neural networks. - Haruyoshi Yonekawa; Shimpei Sato; Hiroki Nakahara; Kota Ando; Kodai Ueyoshi; Kazutoshi Hirose; Kentaro Orimo; Shinya Takamaeda-Yamazaki; Masayuki Ikebe; Tetsuya Asai; Masato Motomura (MWSCAS, 2017)

A Lightweight YOLOv2: A Binarized CNN with A Parallel Support Vector Regression for an FPGA. - Hiroki Nakahara; Haruyoshi Yonekawa; Tomoya Fujii; Shimpei Sato (FPGA, 2018)

A Ternary Weight Binary Input Convolutional Neural Network: Realization on the Embedded Processor. - Haruyoshi Yonekawa; Shimpei Sato; Hiroki Nakahara (ISMVL, 2018)

BRein Memory: A Single-Chip Binary/Ternary Reconfigurable in-Memory Deep Neural Network Accelerator Achieving 1.4 TOPS at 0.6 W. - Kota Ando; Kodai Ueyoshi; Kentaro Orimo; Haruyoshi Yonekawa; Shimpei Sato; Hiroki Nakahara; Shinya Takamaeda-Yamazaki; Masayuki Ikebe; Tetsuya Asai; Tadahiro Kuroda; Masato Motomura (IEEE J. Solid State Circuits, 2018)

GUINNESS: A GUI Based Binarized Deep Neural Network Framework for Software Programmers. - Hiroki Nakahara; Haruyoshi Yonekawa; Tomoya Fujii; Masayuki Shimoda; Shimpei Sato (IEICE Trans. Inf. Syst., 2019)