A four bit low power 165MS/s flash-SAR ADC for sigma-delta ADC application. - Hasan Molaei; Ata Khorami; Mohammad S. Eslampanah Sendi; Khosrow Hajsadeghi (ICECS, 2015)

Wireless interfacing to cortical neural recording implants using 4-FSK modulation scheme. - Mohammad S. Eslampanah Sendi; Mohsen Judy; Hasan Molaei; Amir M. Sodagar; Mohammad Sharifkhani (ICECS, 2015)

A wide dynamic range low power 2× time amplifier using current subtraction scheme. - Hasan Molaei; Ata Khorami; Khosrow Hajsadeghi (ISCAS, 2016)

A low power high resolution time to digital converter for ADPLL application. - Hasan Molaei; Khosrow Hajsadeghi (MWSCAS, 2016)

A low-power comparator-reduced flash ADC using dynamic comparators. - Hasan Molaei; Khosrow Hajsadeghi (ICECS, 2017)

A 1.6 ps 7 b time to digital converter in 0.18 µm CMOS technology. - Hasan Molaei; Khosrow Hajsadeghi (Microelectron. J., 2017)

Design of low power comparator-reduced hybrid ADC. - Hasan Molaei; Khosrow Hajsadeghi; Ata Khorami (Microelectron. J., 2018)

A 5.3-ps, 8-b Time to Digital Converter Using a New Gain-Reconfigurable Time Amplifier. - Hasan Molaei; Khosrow Hajsadeghi (IEEE Trans. Circuits Syst. II Express Briefs, 2019)