Domain Specific Intent Classification of Sinhala Speech Data. - Darshana Buddhika; Ranula Liyadipita; Sudeepa Nadeeshan; Hasini Witharana; Sanath Jayasena; Uthayasanker Thayasivam (IALP, 2018)

Directed Test Generation for Activation of Security Assertions in RTL Models. - Hasini Witharana; Yangdi Lyu; Prabhat Mishra 001 (ACM Trans. Design Autom. Electr. Syst., 2021)

Speculative Load Forwarding Attack on Modern Processors. - Hasini Witharana; Prabhat Mishra 001 (ICCAD, 2022)

Network-on-Chip Trust Validation Using Security Assertions. - Aruna Jayasena; Binod Kumar; Subodha Charles; Hasini Witharana; Prabhat Mishra 001 (J. Hardw. Syst. Secur., 2022)

A Survey on Assertion-based Hardware Verification. - Hasini Witharana; Yangdi Lyu; Subodha Charles; Prabhat Mishra 001 (ACM Comput. Surv., 2022)

Dynamic Refinement of Hardware Assertion Checkers. - Hasini Witharana; Sahan Sanjaya; Prabhat Mishra 001 (DATE, 2023)

Sequence-Based Incremental Concolic Testing of RTL Models. - Hasini Witharana; Aruna Jayasena; Prabhat Mishra 001 (CoRR, 2023)

quAssert: Automatic Generation of Quantum Assertions. - Hasini Witharana; Daniel Volya; Prabhat Mishra 001 (CoRR, 2023)

Automated Generation of Security Assertions for RTL Models. - Hasini Witharana; Aruna Jayasena; Andrew Whigham; Prabhat Mishra 001 (ACM J. Emerg. Technol. Comput. Syst., 2023)

QcAssert: Quantum Device Testing with Concurrent Assertions. - Hasini Witharana; Daniel Volya; Prabhat Mishra 001 (ASPDAC, 2024)

Verifying Memory Confidentiality and Integrity of Intel TDX Trusted Execution Environments. - Hasini Witharana; Debapriya Chatterjee; Prabhat Mishra 001 (HOST, 2024)

Assertion-Based Validation using Clustering and Dynamic Refinement of Hardware Checkers. - Sahan Sanjaya; Hasini Witharana; Prabhat Mishra 001 (ACM Trans. Design Autom. Electr. Syst., 2024)

Incremental Concolic Testing of Register-Transfer Level Designs. - Hasini Witharana; Aruna Jayasena; Prabhat Mishra 001 (ACM Trans. Design Autom. Electr. Syst., 2024)

Formal Verification of Virtualization-Based Trusted Execution Environments. - Hasini Witharana; Hansika Weerasena; Prabhat Mishra 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

Security Assertions for Trusted Execution Environments. - Hasini Witharana; Hansika Weerasena; Prabhat Mishra 001 (DATE, 2025)