FPGA implementation of AES-based crypto processor. - Hassan Anwar; Masoud Daneshtalab; Masoumeh Ebrahimi; Juha Plosila; Hannu Tenhunen (ICECS, 2013)

Parameterized AES-Based Crypto Processor for FPGAs. - Hassan Anwar; Masoud Daneshtalab; Masoumeh Ebrahimi; Juha Plosila; Hannu Tenhunen; Sergei Dytckov; Giovanni Beltrame (DSD, 2014)

Efficient STDP Micro-Architecture for Silicon Spiking Neural Networks. - Sergei Dytckov; Masoud Daneshtalab; Masoumeh Ebrahimi; Hassan Anwar; Juha Plosila; Hannu Tenhunen (DSD, 2014)

Exploring Spiking Neural Network on Coarse-Grain Reconfigurable Architectures. - Hassan Anwar; Syed M. A. H. Jafri; Sergei Dytckov; Masoud Daneshtalab; Masoumeh Ebrahimi; Ahmed Hemani; Juha Plosila; Giovanni Beltrame; Hannu Tenhunen (MES, 2014)

Integration of AES on Heterogeneous Many-Core System. - Hassan Anwar; Masoud Daneshtalab; Masoumeh Ebrahimi; Marco Ramírez 001; Juha Plosila; Hannu Tenhunen (PDP, 2014)

A probabilistically analysable cache implementation on FPGA. - Hassan Anwar; Chao Chen 031; Giovanni Beltrame (NEWCAS, 2015)