FPGA Design of an Intra 16 × 16 Module for H.264/AVC Video Encoder. - Hassen Loukil; Imen Werda; Nouri Masmoudi; Ahmed Ben Atitallah; Patrice Kadionik (Circuits Syst., 2010)

HW/SW TQ/IQT design for H.264/AVC. - Ahmed Ben Atitallah; Hassen Loukil; Nouri Masmoudi (ICECS, 2011)

FPGA architecture of the LDPS Motion Estimation for H.264/AVC Video Coding. - Moez Kthiri; Hassen Loukil; Ahmed Ben Atitallah; Patrice Kadionik; Dominique Dallet; Nouri Masmoudi (J. Signal Process. Syst., 2012)

Free multiplication integer transformation for the HEVC standard. - Fatma Belghith; Hassen Loukil; Nouri Masmoudi (SSD, 2013)

An efficient architecture VLSI for 4×4 intra prediction in HEVC standard. - Manel Kammoun; Ahmed Ben Atitallah; Hassen Loukil; Nouri Masmoudi (SSD, 2013)

TZSearch pattern search improvement for HEVC motion estimation modules. - Hassan Kibeya; Fatma Belghith; Hassen Loukil; Mohamed Ali Ben Ayed; Nouri Masmoudi (ATSIP, 2014)

An optimized and unified architecture design for H.265/HEVC 1-D inverse core transform. - Ahmed Kammoun; Fatma Belghith; Hassen Loukil; Nouri Masmoudi (IPAS, 2016)

A new fast motion estimation algorithm using fast mode decision for high-efficiency video coding standard. - Fatma Belghith; Hassan Kibeya; Hassen Loukil; Mohamed Ali Ben Ayed; Nouri Masmoudi (J. Real Time Image Process., 2016)

A Novel Deblocking Filter Architecture for H.264/AVC. - Lella Aicha Ayadi; Taheni Dammak; Hassen Loukil; Mohamed Ali Ben Ayed; Nouri Masmoudi (J. Signal Process. Syst., 2017)

HEVC Decoder Analysis on ARM Processor. - Lella Aicha Ayadi; Taheni Damak; Hassen Loukil; Mohamed Ali Ben Ayed; Nouri Masmoudi (SSD, 2018)

Efficient implementation of HEVC decoder on Zynq SoC platform. - Lella Aicha Ayadi; Hassen Loukil; Mohamed Ali Ben Ayed; Nouri Masmoudi (ATSIP, 2018)

A Hardware-Efficient Parallel Architecture for HEVC Deblocking Filter. - Lella Aicha Ayadi; Wided Boubakri; Hassen Loukil; Nouri Masmoudi (SSD, 2019)

Hardware-software implementation of HEVC decoder on Zynq. - Lella Aicha Ayadi; Hassen Loukil; Mohamed Ali Ben Ayed; Nouri Masmoudi (Multim. Tools Appl., 2020)

A novel architecture design for VLSI implementation of integer DCT in HEVC standard. - Hassen Loukil; Nouri Masmoudi (Multim. Tools Appl., 2020)

A Novel Non-DC Biased Intensity Modulated Indoor MIMO-VLC System Using Walsh Precoder. - P. Muneer; V. P. Thafasal Ijyas; Mohamed Abbas; Hassen Loukil; Ali Algahtani; Amir Kessentini; Abdul Wase Mohammed (Wirel. Commun. Mob. Comput., 2020)

A new hardware architecture of the adaptive vector median filter and validation in a hardware/software environment. - Ahmed Ben Atitallah; Imen Abid; Anis Boudabous; Hassen Loukil (Int. J. Circuit Theory Appl., 2021)

Intelligent Measuring of the Volume Fraction Considering Temperature Changes and Independent Pressure Variations for a Two-Phase Homogeneous Fluid Using an 8-Electrode Sensor and an ANN. - Ramy Mohammed Aiesh Qaisi; Farhad Fouladinia; Abdulilah Mohammad Mayet; John William Grimaldo Guerrero; Hassen Loukil; M. Ram Kumar Raja; Mohammed Abdul Muqeet 001; Ehsan Eftekhari-Zadeh (Sensors, 2023)

Hardware implementation and validation of the fast variable block size motion estimation architecture for HEVC Standard. - Hassen Loukil; Abdulilah Mohammad Mayet (Multim. Tools Appl., 2023)

FPGA based Unified Architecture for H.266/VVC 1-D DCT-II Transform. - Jubran Alshahrani; Hassen Loukil (ATSIP, 2024)

Innovative protection schemes through hardware-in-the-loop dynamic testing. - Feras Alasali; Naser El-Naily; Haytham Y. Mustafa; Hassen Loukil; Saad M. Saad; Abdelaziz Salah Saidi; William Holderbaum (Comput. Electr. Eng., 2024)

Advanced Microgrid Protection Utilizing Zero Sequence Components With Hard-Ware-in-the-Loop Testing. - Zahra Ghanem; Feras Alasali; Naser El-Naily; Hassen Loukil; Haytham Y. Mustafa; Saad M. Saad; Abdelaziz Salah Saidi; William Holderbaum (IEEE Access, 2025)