A timing model for static CMOS gates. - Hau-Yung Chen; Santanu Dutta (ICCAD, 1989)

Design automation for high performance complementary metal oxide-semiconductor VLSI circuits - Hau-Yung Chen (1989)

Practical electrical parameter aware methodology for analog designers with emphasis on LDE aware for devices. - Hau-Yung Chen; Ming Juan; Hsin-Hao Chen 003; Arvin Guan (VLSI-DAT, 2014)