Generic BIST architecture for testing of content addressable memories. - Hayk T. Grigoryan; Gurgen Harutunyan; Samvel K. Shoukourian; Valery A. Vardanian; Yervant Zorian (IOLTS, 2011)

Advanced ECC-Based FIT Rate Mitigation Technique for Automotive SoCs. - Hayk T. Grigoryan; Samvel K. Shoukourian; Gurgen Harutyunyan; Yervant Zorian; Costas Argyrides (ITC, 2018)

Defect injection, Fault Modeling and Test Algorithm Generation Methodology for STT-MRAM. - Sarath Mohanachandran Nair; Rajendra Bishnoi; Mehdi Baradaran Tahoori; Grigor Tshagharyan; Hayk T. Grigoryan; Gurgen Harutyunyan; Yervant Zorian (ITC, 2018)

Power Supply Noise Rejection Improvement Method in Modern VLSI Design. - Vazgen Sh. Melikyan; Artur Kh. Mkhitaryan; Hakob T. Kostanyan; Hayk T. Grigoryan; T. Kostanyan Harutyun; Mushegh T. Grigoryan; Ruben H. Musayelyan; Hayk V. Margaryan (EWDTS, 2019)

Variation-aware Fault Modeling and Test Generation for STT-MRAM. - Sarath Mohanachandran Nair; Rajendra Bishnoi; Mehdi Baradaran Tahoori; Hayk T. Grigoryan; Grigor Tshagharyan (IOLTS, 2019)

Memory FIT Rate Mitigation Technique for Automotive SoCs. - Gabriele Boschi; Donato Luongo; Duccio Lazzarotti; Hanna Shaheen; Hayk T. Grigoryan; Gurgen Harutyunyan; Samvel K. Shoukourian; Yervant Zorian (ITC, 2019)

Innovative Practices on In-System Test and Reliability of Memories. - S. Bandyopadhyay; J. Mekkoth; Marc Hutner; Hayk T. Grigoryan; Arun Kumar; Samvel K. Shoukourian; Grigor Tshagharyan; Yervant Zorian; Gabriele Boschi; Duccio Lazzarotti; Donato Luongo; Hanna Shaheen; et al. (VTS, 2019)

Die-to-Die Testing and ECC Error Mitigation in Automotive and Industrial Safety Applications. - Gabriele Boschi; Elisa Spano; Hayk T. Grigoryan; Arun Kumar; Gurgen Harutyunyan (ITC, 2020)