Punobot: Mobile Botnet Using Push Notification Service in Android. - Hayoung Lee; Taeho Kang; Sangho Lee 001; Jong Kim 001; Yoonho Kim (WISA, 2013)

Discussion of cost-effective redundancy architectures. - Keewon Cho; Jooyoung Kim; Hayoung Lee; Sungho Kang 001 (ISOCC, 2016)

A new repair scheme for TSV-based 3D memory using base die repair cells. - Donghyun Han; Hayoung Lee; Donghyun Kim; Sungho Kang 001 (ISOCC, 2017)

3D Memory Formed of Unrepairable Memory Dice and Spare Layer. - Donghyun Han; Hayoung Lee; Seungtaek Lee; Minho Moon; Sungho Kang 001 (TENCON, 2018)

Fault Group Pattern Matching With Efficient Early Termination for High-Speed Redundancy Analysis. - Hayoung Lee; Kiwon Cho; Donghyun Kim; Sungho Kang 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

Fast Built-In Redundancy Analysis Based on Sequential Spare Line Allocation. - Hayoung Lee; Jooyoung Kim; Keewon Cho; Sungho Kang 001 (IEEE Trans. Reliab., 2018)

An Area-Efficient BIRA With 1-D Spare Segments. - Donghyun Kim; Hayoung Lee; Sungho Kang 001 (IEEE Trans. Very Large Scale Integr. Syst., 2018)

Redundancy Analysis based on Fault Distribution for Memory with Complex Spares. - Hayoung Lee; Donghyun Han; Seungtaek Lee; Sungho Kang 001 (ISOCC, 2019)

Dynamic Built-In Redundancy Analysis for Memory Repair. - Hayoung Lee; Donghyun Han; Seungtaek Lee; Sungho Kang 001 (IEEE Trans. Very Large Scale Integr. Syst., 2019)

Memory-like Defect Diagnosis for CMOL FPGAs. - Jihye Kim 002; Hayoung Lee; Seokjun Jang; Hogyeong Kim; Sungho Kang 001 (ISOCC, 2020)

Redundancy Analysis Optimization with Clustered Known Solutions for High Speed Repair. - Hayoung Lee; Donghyun Han; Hogyeong Kim; Sungho Kang 001 (ISOCC, 2020)

W-ERA: One-Time Memory Repair with Wafer-Level Early Repair Analysis for Cost Reduction. - Hayoung Lee; Donghyun Han; Hogyeong Kim; Sungho Kang 001 (ITC-Asia, 2020)

Fail Memory Configuration Set for RA Estimation. - Hayoung Lee; Keewon Cho; Sungho Kang 001; Wooheon Kang; Seungtaek Lee; Woosik Jeong (ITC, 2020)

Fine-Grained Defect Diagnosis for CMOL FPGA Circuits. - Jihye Kim 002; Hayoung Lee; Seokjun Jang; Sungho Kang 001 (IEEE Access, 2020)

GPU-Based Redundancy Analysis Using Concurrent Evaluation. - Tae Hyun Kim; Hayoung Lee; Sungho Kang 001 (IEEE Trans. Very Large Scale Integr. Syst., 2020)

An Effective Spare Allocation Methodology for 3D Memory Repair with BIRA. - Seung Ho Shin; Hayoung Lee; Younwoo Yoo; Sungho Kang 001 (ISOCC, 2021)

Post-bond Repair of Line Faults with Double-bit ECC for 3D Memory. - Younwoo Yoo; Hayoung Lee; Seung Ho Shin; Sungho Kang 001 (ISOCC, 2021)

Effective Spare Line Allocation Built-in Redundancy Analysis With Base Common Spare for Yield Improvement of 3D Memory. - Donghyun Han; Hayoung Lee; Sungho Kang 001 (IEEE Access, 2021)

ECC-Aware Fast and Reliable Pattern Matching Redundancy Analysis for Highly Reliable Memory. - Donghyun Han; Hayoung Lee; Seungtaek Lee; Sungho Kang 001 (IEEE Access, 2021)

On-Chip Error Detection Reusing Built-In Self-Repair for Silicon Debug. - Hayoung Lee; Hyunggoy Oh; Sungho Kang 001 (IEEE Access, 2021)

ZOS: Zero Overhead Scan for Systolic Array-based AI accelerator. - Jihye Kim 002; Hayoung Lee; Jongho Park; Sungho Kang 001 (ISOCC, 2022)

PROG: Per-Row Output Generator for BOST. - Sooryeong Lee; Hayoung Lee; Younwoo Yoo; Seung Ho Shin; Sungho Kang 001 (ISOCC, 2022)

FAME: Fault Address Memory Structure for Repair Time Reduction. - Hayoung Lee; Sooryeong Lee; Younwoo Yoo; Seung Ho Shin; Sungho Kang 001 (ISOCC, 2022)

An Improved Early Termination Methodology Using Convolutional Neural Network. - Seung Ho Shin; Hayoung Lee; Sooryeong Lee; Younwoo Yoo; Sungho Kang 001 (ISOCC, 2022)

Multibank Optimized Redundancy Analysis Using Efficient Fault Collection. - Hogyeong Kim; Hayoung Lee; Donghyun Han; Sungho Kang 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

ECMO: ECC Architecture Reusing Content-Addressable Memories for Obtaining High Reliability in DRAM. - Hayoung Lee; Younwoo Yoo; Seung Ho Shin; Sungho Kang 001 (IEEE Trans. Very Large Scale Integr. Syst., 2022)

Redundancy Analysis Simplification Scheme for High-Speed Memory Repair. - Hayoung Lee; Younwoo Yoo; Seung Ho Shin; Sungho Kang 001 (ISOCC, 2023)

GPU-Based Redundancy Analysis using Partitioning Method for Memory Repair. - Younwoo Yoo; Hayoung Lee; Seung Ho Shin; Sungho Kang 001 (ISOCC, 2023)

HPCClusterScape: Increasing Transparency and Efficiency of Shared High-Performance Computing Clusters for Large-scale AI Models. - Heungseok Park; Aeree Cho; Hyojun Jeon; Hayoung Lee; Youngil Yang; Sungjae Lee; Heungsub Lee; Jaegul Choo (CoRR, 2023)

Sentiment analysis and counselling for COVID-19 pandemic based on social media. - Hayoung Lee; Ok-Ran Jeong (Int. J. Web Grid Serv., 2023)

A Knowledge-Grounded Task-Oriented Dialogue System with Hierarchical Structure for Enhancing Knowledge Selection. - Hayoung Lee; Okran Jeong (Sensors, 2023)

TRUST: Through-Silicon via Repair Using Switch Matrix Topology. - Hayoung Lee; Seung Ho Shin; Younwoo Yoo; Sungho Kang 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

STRAIT: Self-Test and Self-Recovery for AI Accelerator. - Hayoung Lee; Jihye Kim 002; Jongho Park; Sungho Kang 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

Scan Architecture with Data Observation for Multiple Scan Cell Fault Diagnosis. - Juyong Lee; Sooryeong Lee; Hayoung Lee; Sungho Kang 001 (ISOCC, 2024)

APAPG: Address Pre-Processed ALPG for High-Speed Linear Test. - Sooryeong Lee; Hayoung Lee; Juyong Lee; Sungho Kang 001 (ISOCC, 2024)

An Efficient Scan Diagnosis for Intermittent Faults Using CNN With Multi-Channel Data. - Hyojoon Yun; Hyeonchan Lim; Hayoung Lee; Doohyun Yoon; Sungho Kang 001 (IEEE Access, 2024)

HyperCLOVA X Technical Report. - Kang Min Yoo; Jaegeun Han; Sookyo In; Heewon Jeon; Jisu Jeong; Jaewook Kang; Hyunwook Kim; Kyung-Min Kim; Munhyong Kim; Sungju Kim; Donghyun Kwak; Hanock Kwak; et al. (CoRR, 2024)

A New Fail Address Memory Architecture for Cost-Effective ATE. - Hayoung Lee; Sooryeong Lee; Sungho Kang 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

RA-Aware Fail Data Collection Architecture for Cost Reduction. - Hayoung Lee; Sooryeong Lee; Sungho Kang 001 (IEEE Trans. Very Large Scale Integr. Syst., 2024)

A New ISA for High-Speed and Area-Efficient ALPG. - Juyong Lee; Hayoung Lee; Sooryeong Lee; Sungho Kang 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

Leveraging Medical Knowledge Graphs and Large Language Models for Enhanced Mental Disorder Information Extraction. - Chaelim Park; Hayoung Lee; OkRan Jeong (Future Internet, 2024)

GRAP: Efficient GPU-Based Redundancy Analysis Using Parallel Evaluation for Cross Faults. - Seung Ho Shin; Hayoung Lee; Sungho Kang 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

An Area-Efficient Systolic Array Redundancy Architecture for Reliable AI Accelerator. - Hayoung Lee; Jongho Park; Sungho Kang 001 (IEEE Trans. Very Large Scale Integr. Syst., 2024)

RAPID: Redundancy Analysis With Parallelized and Intelligent Distribution. - Younwoo Yoo; Hayoung Lee; Seung Ho Shin; Sungho Kang 001 (IEEE Access, 2025)

HuDEx: Integrating Hallucination Detection and Explainability for Enhancing the Reliability of LLM responses. - Sujeong Lee; Hayoung Lee; Seongsoo Heo; Wonik Choi (CoRR, 2025)

A New Pipelined Output Data Reducer of BOST for Improved Parallelism. - Sooryeong Lee; Hayoung Lee; Juyong Lee; Sungho Kang 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)

Effective Parallel Redundancy Analysis Using GPU for Memory Repair. - Seung Ho Shin; Hayoung Lee; Sungho Kang 001 (IEEE Trans. Very Large Scale Integr. Syst., 2025)

A Cost-Effective Per-Pin ALPG for High-Speed Memory Testing. - Juyong Lee; Hayoung Lee; Sooryeong Lee; Sungho Kang 001 (IEEE Trans. Very Large Scale Integr. Syst., 2025)

A Robust Test Architecture for Low-Power AI Accelerators. - Hayoung Lee; Juyong Lee; Sungho Kang 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)

A Built-In Self-Repair With Maximum Fault Collection and Fast Analysis Method for HBM. - Joonsik Yoon; Hayoung Lee; Youngki Moon; Seung Ho Shin; Sungho Kang 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)

An Efficient Test Architecture Using Hybrid Built-In Self-Test for Processing-in-Memory. - Hayoung Lee; Juyong Lee; Sungho Kang 001 (IEEE Trans. Very Large Scale Integr. Syst., 2025)

A Novel CNN-Based Redundancy Analysis Using Parallel Solution Decision. - Seung Ho Shin; Minho Cheong; Hayoung Lee; Byungsoo Kim; Sungho Kang 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)

Multistage Enhanced Diagnosis With Fault Candidate Reduction. - Hyojoon Yun; Hyeonchan Lim; Hayoung Lee; Sungho Kang 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)