Systematic Embedded Software Generation from Systemc. - Fernando Herrera; Héctor Posadas; Pablo Sánchez; Eugenio Villar (Embedded Software for SoC, 2003)

Systemic Embedded Software Generation from SystemC. - Fernando Herrera; Hector Posadas; Pablo Sánchez; Eugenio Villar (DATE, 2003)

Platform Based on Open-Source Cores for Industrial Applications. - María del Milagro Bolado; Hector Posadas; Javier Castillo; Pablo Huerta; Pablo Sánchez; Carlos Sánchez; Häkan Fouren; Francisco Blasco (DATE, 2004)

System-Level Performance Analysis in SystemC. - Hector Posadas; Fernando Herrera; Pablo Sánchez; Eugenio Villar; Francisco Blasco (DATE, 2004)

Single Source Design Environment for Embedded Systems Based on SystemC. - Hector Posadas; Fernando Herrera; Víctor Fernández 001; Pablo Sánchez; Eugenio Villar; Francisco Blasco (Des. Autom. Embed. Syst., 2004)

RTOS modeling in SystemC for real-time embedded SW simulation: A POSIX model. - Hector Posadas; Jesús Ádamez; Eugenio Villar; Francisco Blasco; F. Escuder (Des. Autom. Embed. Syst., 2005)

POSIX modeling in SystemC. - Hector Posadas; Jesús Ádamez; Pablo Sánchez; Eugenio Villar; Francisco Blasco (ASP-DAC, 2006)

Protocol Bus Modeling using inheritance with TLM2.0. - Hector Posadas; David Quijano; Eugenio Villar; Marcos Martínez (FDL, 2007)

Automatic HW/SW Interface Modeling for Scratch-Pad and Memory Mapped HW Components in Native Source-Code Co-simulation. - Hector Posadas; Eugenio Villar (IESS, 2009)

Modeling Separate Memory Spaces in Native Co-simulation with SystemC for Design Space Exploration. - Hector Posadas; Eugenio Villar (ARCS Workshops, 2010)

Fast instruction cache modeling for approximate timed HW/SW co-simulation. - Juan Castillo; Hector Posadas; Eugenio Villar; Marcos Martínez (ACM Great Lakes Symposium on VLSI, 2010)

Formal Modeling for UML/MARTE Concurrency Resources. - Pablo Peñil; Hector Posadas; Eugenio Villar (ICECCS, 2010)

Early Modeling of Linux-Based RTOS Platforms in a SystemC Time-Approximate Co-simulation Environment. - Hector Posadas; Eugenio Villar; Dominique Ragot; Marcos Martínez (ISORC, 2010)

MULTICUBE: Multi-Objective Design Space Exploration of Multi-Core Architectures. - Cristina Silvano; William Fornaciari; Gianluca Palermo; Vittorio Zaccaria; Fabrizio Castro; Marcos Martínez; Sara Bocchio; Roberto Zafalon; Prabhat Avasare; Geert Vanmeerbeeck; Chantal Ykman-Couvreur; Maryse Wouters; et al. (ISVLSI (Selected papers), 2010)

L2 Cache Modeling based on address modification for Native Co-Simulation in SystemC. - Sara Real; Hector Posadas; Eugenio Villar (SIES, 2010)

Generating heterogeneous executable specifications in SystemC from UML/MARTE models. - Pablo Peñil; Julio L. Medina; Hector Posadas; Eugenio Villar (Innov. Syst. Softw. Eng., 2010)

High-level modeling and exploration of a powerline communication network based on System-on-Chip. - Marcos Martínez; David Ferruz; Hector Posadas; Eugenio Villar (Multi-objective Design Space Exploration of Multiprocessor SoC Architectures, 2011)

M3-SCoPE: Performance Modeling of Multi-Processor Embedded Systems for Fast Design Space Exploration. - Hector Posadas; Sara Real; Eugenio Villar (Multi-objective Design Space Exploration of Multiprocessor SoC Architectures, 2011)

The MULTICUBE Design Flow. - Cristina Silvano; William Fornaciari; Gianluca Palermo; Vittorio Zaccaria; Fabrizio Castro; Marcos Martínez; Sara Bocchio; Roberto Zafalon; Prabhat Avasare; Geert Vanmeerbeeck; Chantal Ykman-Couvreur; Maryse Wouters; et al. (Multi-objective Design Space Exploration of Multiprocessor SoC Architectures, 2011)

Fast data-cache modeling for native co-simulation. - Hector Posadas; Luis Diaz; Eugenio Villar (ASP-DAC, 2011)

Early, time-approximate modeling of multi-OS. linux platforms in a systemC co-simulation environment. - Hector Posadas; Eugenio Villar; Dominique Ragot; Marcos Martínez (Comput. Syst. Sci. Eng., 2011)

A Multi-Processing Systems-on-Chip Native Simulation Framework for Power and Thermal-Aware Design. - Daniel Calvo; Pablo González; Luis Diaz; Hector Posadas; Pablo Sánchez; Eugenio Villar; Andrea Acquaviva; Enrico Macii (J. Low Power Electron., 2011)

A MDD methodology for specification of embedded systems and automatic generation of fast configurable and executable performance models. - Fernando Herrera; Hector Posadas; Pablo Peñil; Eugenio Villar; Francisco Ferrero 002; Raúl Valencia (CODES+ISSS, 2012)

The COMPLEX Eclipse framework for UML/MARTE specification and design space exploration of embedded systems. - Fernando Herrera; Hector Posadas; Pablo Peñil; Eugenio Villar; Francisco Ferrero 002; Raúl Valencia (DASIP, 2012)

Enhanced IP-XACT Platform Descriptions for Automatic Generation from UML/MARTE of Fast Performance Models for DSE. - Fernando Herrera; Hector Posadas; Eugenio Villar; Daniel Calvo (DSD, 2012)

A model-driven methodology for the development of SystemC executable environments. - Fernando Herrera; Pablo Peñil; Hector Posadas; Eugenio Villar (FDL, 2012)

Model-Driven Methodology for the Development of Multi-level Executable Environments. - Fernando Herrera; Pablo Peñil; Hector Posadas; Eugenio Villar (FDL (Selected Papers), 2012)

Automatic synthesis from UML/MARTE models using channel semantics. - Pablo Peñil; Héctor Posadas; Alejandro Nicolás; Eugenio Villar (ACES-MB@MoDELS, 2012)

Early Performance Evaluation of Multi-OS Embedded Platforms Using Native Simulation. - Rodrigo Fernández; Hector Posadas; Eugenio Villar (DSD, 2013)

EU FP7-288307 Pharaon Project: Parallel and Heterogeneous Architecture for Real-Time Applications. - Hector Posadas; Eugenio Villar; Florian Broekaert; Michel Bourdellès; Albert Cohen 001; Antoniu Pop; Nhat Minh Lê; Adrien Guatto; Mihai T. Lazarescu; Luciano Lavagno; Andrei Sergeevich Terechko; Miguel Glassee; et al. (DSD, 2013)

Automatic Synthesis over Multiple APIs from Uml/Marte Models for Easy Platform Mapping and Reuse. - Alejandro Nicolás; Pablo Peñil; Héctor Posadas; Eugenio Villar (DSD, 2014)

A framework for design space exploration and performance analysis of networked embedded systems. - Emad Samuel Malki Ebeid; Franco Fummi; Davide Quaglia; Hector Posadas; Eugenio Villar (RAPIDO, 2014)

The COMPLEX methodology for UML/MARTE Modeling and design space exploration of embedded systems. - Fernando Herrera; Hector Posadas; Pablo Peñil; Eugenio Villar; Francisco Ferrero 002; Raúl Valencia; Gianluca Palermo (J. Syst. Archit., 2014)

Improving the design flow for parallel and heterogeneous architectures running real-time applications: The PHARAON FP7 project. - Héctor Posadas; Alejandro Nicolás; Pablo Peñil; Eugenio Villar; Florian Broekaert; Michel Bourdellès; Albert Cohen 001; Mihai T. Lazarescu; Luciano Lavagno; Andrei Sergeevich Terechko; Miguel Glassee; Manuel Prieto (Microprocess. Microsystems, 2014)

Automatic synthesis of embedded SW for evaluating physical implementation alternatives from UML/MARTE models supporting memory space separation. - Héctor Posadas; Pablo Peñil; Alejandro Nicolás; Eugenio Villar (Microelectron. J., 2014)

Automatic synthesis of communication and concurrency for exploring component-based system implementations considering UML channel semantics. - Héctor Posadas; Pablo Peñil; Alejandro Nicolás; Eugenio Villar (J. Syst. Archit., 2015)

Using Professional Resources for Teaching Embedded SW Development. - Hector Posadas; Eugenio Villar (Rev. Iberoam. de Tecnol. del Aprendiz., 2016)

Static Write Buffer Cache Modeling to Increase Host-Compiled Simulation Accuracy. - Hector Posadas; Luis Diaz; Eugenio Villar (DSD, 2017)

Synthesis of simulation and implementation code for OpenMAX multimedia heterogeneous systems from UML/MARTE models. - David de la Fuente; Jesús Barba; Juan Carlos López 001; Pablo Peñil; Héctor Posadas; Pablo Sánchez Espeso (Multim. Tools Appl., 2017)

High-Level Design of Wireless Sensor Networks for Performance Optimization Under Security Hazards. - Pablo Peñil; Álvaro Díaz Suárez; Hector Posadas; Julio L. Medina; Pablo Sánchez Espeso (ACM Trans. Sens. Networks, 2017)

Accelerating Host-Compiled Simulation by Modifying IR Code: Industrial application in the spatial domain. - Héctor Posadas; Eugenio Villar; Manuel Sanchez-Renedo (DCIS, 2019)

Data flow analysis from UML/MARTE models based on binary traces. - Héctor Posadas; Javier Merino; Eugenio Villar (DCIS, 2020)

Run-time Monitoring and Trace Analysis Methodology for Component-based Embedded Systems Design Flow. - Vittoriano Muttillo; Giacomo Valente; Luigi Pomante; Hector Posadas; Javier Merino; Eugenio Villar (DSD, 2020)

Mega-modeling of complex, distributed, heterogeneous CPS systems. - Eugenio Villar; Javier Merino; Hector Posadas; Rafik Henia; Laurent Rioux (Microprocess. Microsystems, 2020)

Multilevel host-compiled simulation framework for ROS-based UAV services using ArduCopter. - Javier Merino; Raul Gomez; Hector Posadas; Eugenio Villar (DCIS, 2021)

Modeling and Performance Estimation of Robotic Systems using ROS: Application to drone-based Services. - Javier Merino; Raul Gomez; Hector Posadas; Eugenio Villar (FDL, 2021)

Automatic code generation from UML for data memory optimization in microcontrollers. - Héctor Posadas; José Luis Vázquez; Eugenio Villar (DCIS, 2023)

UML-Based Design Flow for Systems with Neural Networks. - Daniel Suárez; Héctor Posadas; Víctor Fernández 001 (DCIS, 2023)

Accelerating the Verification of Forward Error Correction Decoders by PCIe FPGA Cards. - Daniel Suárez; Víctor Fernández 001; Héctor Posadas; Pablo Sánchez (IEEE Embed. Syst. Lett., 2023)

AI-based estimation of embedded software execution cycles in host-compiled simulation. - Raúl Gómez-Varela; David Aledo; Héctor Posadas; Eugenio Villar (DCIS, 2024)

CNN-LSTM Implementation Methodology on SoC FPGA for Human Action Recognition Based on Video. - Daniel Suárez; Víctor Fernández 001; Héctor Posadas (DSD, 2024)