Reliability analysis of small delay defects in vias located in signal paths. - Hector Villacorta; Víctor H. Champac; Chuck Hawkins; Jaume Segura 001 (LATW, 2010)

Resistive bridge defect detection enhancement under parameter variations combining Low VDD and body bias in a delay based test. - Hector Villacorta; Víctor H. Champac; Sebastià A. Bota; Jaume Segura 001 (Microelectron. Reliab., 2012)

Bridge defect detection in nanometer CMOS circuits using Low VDD and body bias. - Hector Villacorta; Jose Luis Garcia-Gervacio; Víctor H. Champac; Sebastià A. Bota; Jaime Martínez-Castillo; Jaume Segura 001 (LATW, 2013)

Reliability Analysis of Small-Delay Defects Due to Via Narrowing in Signal Paths. - Hector Villacorta; Charles F. Hawkins; Víctor H. Champac; Jaume Segura 001; Roberto Gómez 001 (IEEE Des. Test, 2013)

Analysis of fin height on FinFET SRAM cell hardening. - Hector Villacorta; Jaume Segura 001; Sebastià A. Bota; Víctor H. Champac (MWSCAS, 2014)

Skew violation verification in digital interconnect signals based on signal addition. - Víctor H. Champac; Hector Villacorta; Nestor Hernandez; Joan Figueras (IEICE Electron. Express, 2014)

Impact of increasing the fin height on soft error rate and static noise margin in a FinFET-based SRAM cell. - Hector Villacorta; Roberto Gómez 001; Sebastià A. Bota; Jaume Segura 001; Víctor H. Champac (LATS, 2015)

Low VDD and body bias conditions for testing bridge defects in the presence of process variations. - Hector Villacorta; Jose Luis Garcia-Gervacio; Jaume Segura 001; Víctor H. Champac (Microelectron. J., 2015)

Behavior and test of open-gate defects in FinFET based cells. - Francisco Mesalles; Hector Villacorta; Michel Renovell; Víctor H. Champac (ETS, 2016)

Impact of Fin-Height on SRAM Soft Error Sensitivity and Cell Stability. - Hector Villacorta; Jaume Segura 001; Víctor H. Champac (J. Electron. Test., 2016)

An accurate novel gate-sizing metric to optimize circuit performance under local intra-die process variations. - Zahira Perez; Hector Villacorta; Víctor H. Champac (VLSI-SoC, 2018)

TCAD analysis and modeling for NBTI mechanism in FinFET transistors. - Alfonso Herrera-Moreno; Jose Luis Garcia-Gervacio; Héctor Villacorta-Minaya; Héctor Vázquez-Leal (IEICE Electron. Express, 2018)

Modeling and Detectability of Full Open Gate Defects in FinFET Technology. - Freddy Forero; Hector Villacorta; Michel Renovell; Víctor H. Champac (IEEE Trans. Very Large Scale Integr. Syst., 2019)

Analysis and detection of hard-to-detect full open defects in FinFET based SRAM cells. - Zahira Perez; Javier Mesalles; Hector Villacorta; Fabian Vargas 001; Víctor H. Champac (LATS, 2020)

Analysis and Detection of Open-gate Defects in Redundant Structures of a FinFET SRAM Cell. - Víctor H. Champac; Javier Mesalles; Hector Villacorta; Fabian Vargas 001 (J. Electron. Test., 2021)

Failure Probability due to Radiation-Induced Effects in FinFET SRAM Cells under Process Variations. - Víctor H. Champac; Hector Villacorta; Roberto Gómez-Fuentes; Fabian Vargas 001; Jaume Segura 001 (J. Electron. Test., 2024)