Hardware accelerator for VVC/H.266 residual syntax elements: a unified and resource-efficient architecture. - Gabriel Bitencourt Cardoso; Heitor Mauro Chavez Huarachi; Daniel Felipe Tomm; Jiovana Sousa Gomes; Rodrigo N. Wuerdig; Marcelo Romero de Moraes; Sergio Bampi; Fábio Luís Livi Ramos (J. Real Time Image Process., 2025)