High Level Area and Current Estimation. - Fei Li 003; Lei He 001; Joseph M. Basile; Rakesh J. Patel; Hema Ramamurthy (PATMOS, 2003)

High-level area and power-up current estimation considering rich cell library. - Fei Li 003; Lei He 001; Joseph M. Basile; Rakesh J. Patel; Hema Ramamurthy (ASP-DAC, 2004)

FinFET SRAM design challenges. - David Burnett; Sanjay Parihar; Hema Ramamurthy; Sriram Balasubramanian (ICICDT, 2014)

Novel Back Gate Doping Ultra Low Retention Power 22nm FDSOl SRAM for IOT Application. - Mingcheng Chang; Nigel Chan; Vivek Joshi; Sandra Hecker; Udo Ziller; Petra Poth; Alban Zaka; Tom Herrmann; Seunghwan Seo; Hongsik Yoon; Xin Zou; Zhen Xu; et al. (ESSDERC, 2018)