Towards improving simulation of analog circuits using model order reduction. - Henda Aridhi; Mohamed H. Zaki; Sofiène Tahar (DATE, 2012)

A semi-formal approach for analog circuits behavioral properties verification. - Ons Lahiouel; Henda Aridhi; Mohamed H. Zaki; Sofiène Tahar (ACM Great Lakes Symposium on VLSI, 2014)

A qualitative simulation approach for verifying PLL locking property. - Ibtissem Seghaier; Henda Aridhi; Mohamed H. Zaki; Sofiène Tahar (ACM Great Lakes Symposium on VLSI, 2014)

Generation of reduced analog circuit models using transient simulation traces. - Paul Winkler; Henda Aridhi; Mohamed H. Zaki; Sofiène Tahar (ACM Great Lakes Symposium on VLSI, 2014)

Enablingy the DC solutions characterization using a fuzzy approach. - Ons Lahiouel; Henda Aridhi; Mohamed H. Zaki; Sofiène Tahar (NEWCAS, 2014)

Enhancing Model Order Reduction for Nonlinear Analog Circuit Simulation. - Henda Aridhi; Mohamed H. Zaki; Sofiène Tahar (IEEE Trans. Very Large Scale Integr. Syst., 2016)

Exploiting bounds optimization for the semi-formal verification of analog circuits. - Ons Lahiouel; Henda Aridhi; Mohamed H. Zaki; Sofiène Tahar (Integr., 2017)