IDD Waveforms Analysis for Testing of Domino and Low Voltage Static CMOS Circuits. - Hendrawan Soeleman; Dinesh Somasekhar; Kaushik Roy 001 (Great Lakes Symposium on VLSI, 1998)

Ultra-low power digital subthreshold logic circuits. - Hendrawan Soeleman; Kaushik Roy 001 (ISLPED, 1999)

Digital CMOS logic operation in the sub-threshold region. - Hendrawan Soeleman; Kaushik Roy 001 (ACM Great Lakes Symposium on VLSI, 2000)

Robust ultra-low power sub-threshold DTMOS logic. - Hendrawan Soeleman; Kaushik Roy 001; Bipul Chandra Paul (ISLPED, 2000)

Estimating Circuit Activity in Combinational CMOS Digital Circuits. - Hendrawan Soeleman; Kaushik Roy 001; Tan-Li Chou (IEEE Des. Test Comput., 2000)

Sub-Domino Logic: Ultra-Low Power Dynamic Sub-Threshold Digital Logic. - Hendrawan Soeleman; Kaushik Roy 001; Bipul Chandra Paul (VLSI Design, 2001)

Robust subthreshold logic for ultra-low power operation. - Hendrawan Soeleman; Kaushik Roy 001; Bipul Chandra Paul (IEEE Trans. Very Large Scale Integr. Syst., 2001)

Ultra-low-power DLMS adaptive filter for hearing aid applications. - Chris Hyung-Il Kim; Hendrawan Soeleman; Kaushik Roy 001 (IEEE Trans. Very Large Scale Integr. Syst., 2003)