Implementation of recursive digital filters into vector SIMD DSP architectures. - Juan Pablo Robelly; Gordon Cichon; Hendrik Seidel; Gerhard P. Fettweis (ICASSP (5), 2004)

Compiler Scheduling for STA-Processors. - Gordon Cichon; Pablo Robelly; Hendrik Seidel; Marcus Bronzel; Gerhard P. Fettweis (PARELEC, 2004)

Automatic Code Generation for SIMD DSP Architectures: An Algebraic Approach. - Pablo Robelly; Gordon Cichon; Hendrik Seidel; Gerhard P. Fettweis (PARELEC, 2004)

Hardware / Software Co-Design of a SIMD-DSP-Based DVB-T Receiver. - Hendrik Seidel; Gordon Cichon; Pablo Robelly; Marcus Bronzel; Gerhard P. Fettweis (PARELEC, 2004)

Synchronous Transfer Architecture (STA). - Gordon Cichon; Pablo Robelly; Hendrik Seidel; Emil Matús; Marcus Bronzel; Gerhard P. Fettweis (SAMOS, 2004)

Generated DSP Cores for Implementation of an OFDM Communication System. - Hendrik Seidel; Emil Matús; Gordon Cichon; Pablo Robelly; Marcus Bronzel; Gerhard P. Fettweis (SAMOS, 2004)

A Compiler-friendly and Low-power DSP architecture. - Emil Matús; Gordon Cichon; Hendrik Seidel; Pablo Robelly; Torsten Limberg; Gerhard P. Fettweis (GI Jahrestagung (1), 2005)

Design and automatic code generation of the LMS algorithm for SIMD signal processors. - Juan Pablo Robelly; Gordon Cichon; Hendrik Seidel; Gerhard P. Fettweis (ICASSP (5), 2005)

A GFLOPS Vector-DSP for Broadband Wireless Applications. - E. Matu; Hendrik Seidel; Torsten Limberg; Pablo Robelly; Gerhard P. Fettweis (CICC, 2006)

Energy efficiency vs. programmability trade-off: architectures and design principles. - Pablo Robelly; Hendrik Seidel; K. C. Chen; Gerhard P. Fettweis (DATE, 2006)

A task level programmable processor. - Hendrik Seidel (2006)