A new method for constructing IP level power model based on power sensitivity. - Heng-Liang Huang; Jiing-Yuan Lin; Wen-Zen Shen; Jing-Yang Jou (ASP-DAC, 2000)

Grouped input power sensitive transition an input sequence compaction technique for power estimation. - Heng-Liang Huang; Yeong-Ren Chen; Jing-Yang Jou; Wen-Zen Shen (ISCAS (5), 2001)

Bootstrap Monte Carlo with Adaptive Stratification for Power Estimation. - Heng-Liang Huang; Jing-Yang Jou (J. Circuits Syst. Comput., 2002)

An efficient logic extraction algorithm using partitioning and circuit encoding. - Lily Huang; Tai-Ying Jiang; Jing-Yang Jou; Heng-Liang Huang (ISCAS (5), 2004)

MAXCell: PPA-Directed Multi-Height Cell Layout Routing Optimization using Anytime MaXSAT with Constraint Learning. - Jiun-Cheng Tsai; Wei-Min Hsu; Yun-Ting Hsieh; Yu-Ju Li; Wei Huang; C. N. Ho; Hsuan-Ming Huang; Jen-Hang Yang; Heng-Liang Huang; Aaron C.-W. Liang; Charles H.-P. Wen (ICCAD, 2024)

ResCap: Fast-yet-Accurate Capacitance Extraction for Standard Cell Design by Physics-Guided Machine Learning. - Jiun-Cheng Tsai; Hsuan-Ming Huang; Wei-Min Hsu; Pei-Ting Lee; Jen-Hang Yang; Heng-Liang Huang; Yen-Ju Su; Charles H.-P. Wen (ASP-DAC, 2025)