Dynamic scheduling of imprecise-computation tasks in maximizing QoS under energy constraints for embedded systems. - Heng Yu 001; Bharadwaj Veeravalli; Yajun Ha (ASP-DAC, 2008)

Tighter WCET analysis of input dependent programs with classified-cache memory architecture. - Yanhui Li; Shakith Fernando; Heng Yu 001; Xiaolei Chen; Yajun Ha; Teng Tiow Tay (ICECS, 2008)

A Multi-Application Mapping Framework for Network-on-Chip Based MPSoC: An FPGA Implementation Case Study. - Guolei Zhu; Heng Yu 001; Yajun Ha; Yingmin Wang (ERSA, 2009)

Leakage-aware dynamic scheduling for real-time adaptive applications on multiprocessor systems. - Heng Yu 001; Bharadwaj Veeravalli; Yajun Ha (DAC, 2010)

Communication-aware application mapping and scheduling for NoC-based MPSoCs. - Heng Yu 001; Yajun Ha; Bharadwaj Veeravalli (ISCAS, 2010)

Cross-Level Compositional Reliability Analysis for Embedded Systems. - Michael Glaß; Heng Yu 001; Felix Reimann; Jürgen Teich (SAFECOMP, 2012)

Dynamic Scheduling of Imprecise-Computation Tasks on Real-Time Embedded Multiprocessors. - Heng Yu 001; Bharadwaj Veeravalli; Yajun Ha; Shaobo Luo (CSE, 2013)

The architecture and placement algorithm for a uni-directional routing based 3D FPGA. - Junsong Hou; Heng Yu 001; Yajun Ha; Xin Liu (FPT, 2013)

Quality-Driven Dynamic Scheduling for Real-Time Adaptive Applications on Multiprocessor Systems. - Heng Yu 001; Yajun Ha; Bharadwaj Veeravalli (IEEE Trans. Computers, 2013)

Thermal-aware frequency scaling for adaptive workloads on heterogeneous MPSoCs. - Heng Yu 001; Rizwan Syed; Yajun Ha (DATE, 2014)

Quality Optimization of Resilient Applications under Temperature Constraints. - Heng Yu 001; Yajun Ha; Jing Wang (Conf. Computing Frontiers, 2017)

Benchmarking of Recommendation Trust Computation for Trust/Trustworthiness Estimation in HDNs. - Hesham El-Sayed; Sharmi Sankar; Heng Yu 001; Gokulnath Thandavarayan (Int. J. Comput. Commun. Control, 2017)

Energy Efficiency Optimization of FPGA-based CNN Accelerators with Full Data Reuse and VFS. - Weixiong Jiang; Heng Yu 001; Xinzhe Liu; Yajun Ha (ICECS, 2019)

Enabling Fine-Grained Dynamic Voltage and Frequency Scaling in SDSoC. - Weixiong Jiang; Heng Yu 001; Yajun Ha (SoCC, 2019)

DVFS-Based Scrubbing Scheduling for Reliability Maximization on Parallel Tasks in SRAM-based FPGAs. - Rui Li 095; Heng Yu 001; Weixiong Jiang; Yajun Ha (DAC, 2020)

An Accurate FPGA Online Delay Monitor Supporting All Timing Paths. - Weixiong Jiang; Rui Li 095; Heng Yu 001; Yajun Ha (ISCAS, 2020)

The impact of language on retweeting during acute natural disasters: uncertainty reduction and language expectancy perspectives. - Chang Heon Lee; Heng Yu 001 (Ind. Manag. Data Syst., 2020)

Quality Estimation and Optimization of Adaptive Stereo Matching Algorithms for Smart Vehicles. - Fupeng Chen; Heng Yu 001; Yajun Ha (ACM Trans. Embed. Comput. Syst., 2020)

TAIT: One-Shot Full-Integer Lightweight DNN Quantization via Tunable Activation Imbalance Transfer. - Weixiong Jiang; Heng Yu 001; Xinzhe Liu; Hao Sun; Rui Li 095; Yajun Ha (DAC, 2021)

CLIF: Cross-Layer Information Fusion for Stereo Matching and its Hardware Implementation. - Fupeng Chen; Xinzhe Liu; Heng Yu 001; Yajun Ha (ISCAS, 2021)

DVFS-Based Quality Maximization for Adaptive Applications With Diminishing Return. - Heng Yu 001; Yajun Ha; Bharadwaj Veeravalli; Fupeng Chen; Hesham El-Sayed (IEEE Trans. Computers, 2021)

Efficient and Accurate Feature Extraction Using Local Density Detector. - Yuting He 002; Jiahui Meng; Chang Heon Lee; Jianfeng Ren; Jingjin Li; Qingyu Yang; Liyu Cai; Heng Yu 001 (AIPR, 2022)

Dynamic Texture Recognition Using PDV Hashing and Dictionary Learning on Multi-Scale Volume Local Binary Pattern. - Ruxin Ding; Jianfeng Ren; Heng Yu 001; Jiawei Li 001 (ICASSP, 2022)

Quality Optimization of Adaptive Applications via Deep Reinforcement Learning in Energy Harvesting Edge Devices. - Fupeng Chen; Heng Yu 001; Weixiong Jiang; Yajun Ha (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

FODM: A Framework for Accurate Online Delay Measurement Supporting All Timing Paths in FPGA. - Weixiong Jiang; Heng Yu 001; Hongtu Zhang; Yuhao Shu; Rui Li 095; Jian Chen; Yajun Ha (IEEE Trans. Very Large Scale Integr. Syst., 2022)

Data Partition Optimization for High Energy Efficiency by Decoupling Local Dependence in Holographic Video Decoder. - Xinzhe Liu; Jianwen Luo 004; David Blinder; Fupeng Chen; Heng Yu 001; Peter Schelkens; Francky Catthoor; Yajun Ha (ICECS, 2023)

NORB: A Stream-Based and Non-Blocking FPGA Accelerator for ORB Feature Extraction. - Qixing Zhang; Hao Sun; Qi Deng; Heng Yu 001; Yajun Ha (ICECS, 2023)

GAN-in-GAN for Monaural Speech Enhancement. - Yicun Duan; Jianfeng Ren; Heng Yu 001; Xudong Jiang 001 (IEEE Signal Process. Lett., 2023)

A High-Throughput Full-Dataflow MobileNetv2 Accelerator on Edge FPGA. - Weixiong Jiang; Heng Yu 001; Yajun Ha (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

AOS: An Automated Overclocking System for High-Performance CNN Accelerator Through Timing Delay Measurement on FPGA. - Weixiong Jiang; Heng Yu 001; Fupeng Chen; Yajun Ha (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

Region-aware RGB and near-infrared image fusion. - Jiacheng Ying; Can Tong; Zehua Sheng; Bo-Wen Yao; Si-Yuan Cao; Heng Yu 001; Hui-Liang Shen (Pattern Recognit., 2023)

Criticality-Aware Negotiation-Driven Scrubbing Scheduling for Reliability Maximization in SRAM-Based FPGAs. - Rui Li 095; Heng Yu 001; Lin Li 079; Yajun Ha (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

Dual-Branch StarNet with Mutual Attention and U-Net Denoising for Simultaneously Recognizing Keywords and Speakers. - Yuting He 002; Chengtai Li; Heng Yu 001; Jianfeng Ren; Zheng Wang 027; Heshan Du; Yinshui Xia (ICONIP (5), 2024)

Regression Residual Reasoning with Pseudo-labeled Contrastive Learning for Uncovering Multiple Complex Compositional Relations. - Chengtai Li; Yuting He 002; Jianfeng Ren; Ruibin Bai; Yitian Zhao; Heng Yu 001; Xudong Jiang 001 (IJCAI, 2024)

A scenario-customizable and visual-rendering simulator for on-vehicle vibration energy harvesting. - Fangcheng Guo; Jingjin Li; Chung Ket Thein; Anqi Gao; Jianfeng Ren; Chang Heon Lee; Jiawei Li 001; Tianxiang Cui; Heng Yu 001 (Sustain. Comput. Informatics Syst., 2024)

DARR: A Dual-Branch Arithmetic Regression Reasoning Framework for Solving Machine Number Reasoning. - Chengtai Li; Yee Yang Tan; Yuting He 002; Jianfeng Ren; Ruibin Bai; Yitian Zhao; Heng Yu 001; Xudong Jiang 001 (AAAI, 2025)

De2r: Unifying DVFS and Early-Exit for Embedded AI Inference via Reinforcement Learning. - Yuting He 002; Jingjin Li; Chengtai Li; Qingyu Yang; Zheng Wang 027; Heshan Du; Jianfeng Ren; Heng Yu 001 (DATE, 2025)

FiDRL: Flexible Invocation-Based Deep Reinforcement Learning for DVFS Scheduling in Embedded Systems. - Jingjin Li; Weixiong Jiang; Yuting He 002; Qingyu Yang; Anqi Gao; Yajun Ha; Ender Özcan; Ruibin Bai; Tianxiang Cui; Heng Yu 001 (IEEE Trans. Computers, 2025)

RefSCAT: Formal Verification of Logic-Optimized Multipliers via Automated Reference Multiplier Generation and SCA-SAT Synergy. - Rui Li 095; Lin Li 079; Heng Yu 001; Masahiro Fujita; Weixiong Jiang; Yajun Ha (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)

LLM4Netlist: LLM-Enabled Step-Based Netlist Generation From Natural Language Description. - Kailiang Ye; Qingyu Yang; Zheng Lu 002; Heng Yu 001; Tianxiang Cui; Ruibin Bai; Linlin Shen (IEEE J. Emerg. Sel. Topics Circuits Syst., 2025)

TFDet: Target-Aware Fusion for RGB-T Pedestrian Detection. - Xue Zhang; Xiaohan Zhang; Jiangtao Wang; Jiacheng Ying; Zehua Sheng; Heng Yu 001; Chunguang Li 001; Hui-Liang Shen (IEEE Trans. Neural Networks Learn. Syst., 2025)