SSM-CIM: An Efficient CIM Macro Featuring Single-Step Multi-bit MAC Computation for CNN Edge Inference. - Heng Zhang 024; Sunan He; Xin Lu; Xinjie Guo; Shaodi Wang; Yuan Du; Li Du (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

A Compilation Framework for SRAM Computing-in-Memory Systems With Optimized Weight Mapping and Error Correction. - Yichuan Bai; Yaqing Li; Heng Zhang 024; Aojie Jiang; Yuan Du; Li Du (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

An Efficient Two-Stage Pipelined Compute-in-Memory Macro for Accelerating Transformer Feed-Forward Networks. - Heng Zhang 024; Wenhe Yin; Sunan He; Yuan Du; Li Du (IEEE Trans. Very Large Scale Integr. Syst., 2024)

An 11T1C Bit-Level-Sparsity-Aware Computing- in-Memory Macro With Adaptive Conversion Time and Computation Voltage. - Ye Lin; Yuandong Li; Heng Zhang 024; He Ma; Jingjing Lv; Anying Jiang; Yuan Du; Li Du (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

Corrections to "An Efficient Two-Stage Pipelined Compute-in-Memory Macro for Accelerating Transformer Feed-Forward Networks". - Heng Zhang 024; Wenhe Yin; Sunan He; Yuan Du; Li Du (IEEE Trans. Very Large Scale Integr. Syst., 2025)