Synthesizing Delay Insensitive Circuits from Verified Programs. - Henrik Hulgaard; Per H. Christensen; Jørgen Staunstrup (Research Directions in High-Level Parallel Programming Languages, 1991)

Practical applications of an efficient time separation of events algorithm. - Henrik Hulgaard; Steven M. Burns; Tod Amon; Gaetano Borriello (ICCAD, 1993)

Bounded delay timing analysis of a class of CSP programs with choice. - Henrik Hulgaard; Steven M. Burns (ASYNC, 1994)

Efficient Timing Analysis of a Class of Petri Nets. - Henrik Hulgaard; Steven M. Burns (CAV, 1995)

Testing asynchronous circuits: A survey. - Henrik Hulgaard; Steven M. Burns; Gaetano Borriello (Integr., 1995)

An Algorithm for Exact Bounds on the Time Separation of Events in Concurrent Systems. - Henrik Hulgaard; Steven M. Burns; Tod Amon; Gaetano Borriello (IEEE Trans. Computers, 1995)

Boolean Expression Diagrams (Extended Abstract). - Henrik Reif Andersen; Henrik Hulgaard (LICS, 1997)

Bounded Delay Timing Analysis of a Class of CSP Programs. - Henrik Hulgaard; Steven M. Burns (Formal Methods Syst. Des., 1997)

Maximum Time Separation of Events in Cyclic Systems with Linear and Latest Timing Constraints. - Fen Jin; Henrik Hulgaard; Eduard Cerny (FMCAD, 1998)

Symbolic Time Separation of Events. - Tod Amon; Henrik Hulgaard (ASYNC, 1999)

Difference Decision Diagrams. - Jesper B. Møller; Jakob Lichtenberg; Henrik Reif Andersen; Henrik Hulgaard (CSL, 1999)

Equivalence checking of hierarchical combinational circuits. - Poul Frederick Williams; Henrik Hulgaard; Henrik Reif Andersen (ICECS, 1999)

Fully Symbolic Model Checking of Timed Systems using Difference Decision Diagrams. - Jesper B. Møller; Jakob Lichtenberg; Henrik Reif Andersen; Henrik Hulgaard (SMC@FLoC, 1999)

Equivalence checking of combinational circuits using Boolean expression diagrams. - Henrik Hulgaard; Poul Frederick Williams; Henrik Reif Andersen (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999)

Practical Verification of Embedded Software. - Jørgen Staunstrup; Henrik Reif Andersen; Henrik Hulgaard; Jørn Lind-Nielsen; Kim Guldstrand Larsen; Gerd Behrmann; Kåre J. Kristoffersen; Arne Skou; Henrik Leerberg; Niels Bo Theilgaard (Computer, 2000)

Symbolic timing analysis of asynchronous systems. - Henrik Hulgaard; Tod Amon (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000)

Verification of Large State/Event Systems Using Compositionality and Dependency Analysis. - Jørn Lind-Nielsen; Henrik Reif Andersen; Henrik Hulgaard; Gerd Behrmann; Kåre J. Kristoffersen; Kim Guldstrand Larsen (Formal Methods Syst. Des., 2001)

Timed Verification of Asynchronous Circuits. - Jesper B. Møller; Henrik Hulgaard; Henrik Reif Andersen (Concurrency and Hardware Design, 2002)

Verification of Hierarchical State/Event Systems using Reusability and Compositionality. - Gerd Behrmann; Kim Guldstrand Larsen; Henrik Reif Andersen; Henrik Hulgaard; Jørn Lind-Nielsen (Formal Methods Syst. Des., 2002)

Boolean Expression Diagrams. - Henrik Reif Andersen; Henrik Hulgaard (Inf. Comput., 2002)

Symbolic model checking of timed guarded commands using difference decision diagrams. - Jesper B. Møller; Henrik Hulgaard; Henrik Reif Andersen (J. Log. Algebraic Methods Program., 2002)

Satisfiability checking using Boolean Expression Diagrams. - Poul Frederick Williams; Henrik Reif Andersen; Henrik Hulgaard (Int. J. Softw. Tools Technol. Transf., 2003)