A 100-MHz CMOS wide-band IF amplifier. - Henrik Sjöland; Sven Mattisson (IEEE J. Solid State Circuits, 1998)

A 160-MHz bipolar wide-band IF amplifier. - Henrik Sjöland; Sven Mattisson (IEEE J. Solid State Circuits, 1998)

A 2.2 GHz CMOS VCO with inductive degeneration noise suppression. - Pietro Andreani; Henrik Sjöland (CICC, 2001)

A filtering technique to lower LC oscillator phase noise. - Emad Hegazi; Henrik Sjöland; Asad A. Abidi (IEEE J. Solid State Circuits, 2001)

Tail current noise suppression in RF CMOS VCOs. - Pietro Andreani; Henrik Sjöland (IEEE J. Solid State Circuits, 2002)

A fully integrated 2.45 GHz 0.25μm CMOS power amplifier. - Ellie Cijvat; Henrik Sjöland (ICECS, 2003)

A merged CMOS LNA and mixer for a WCDMA receiver. - Henrik Sjöland; Ali Karimi-Sanjaani; Asad A. Abidi (IEEE J. Solid State Circuits, 2003)

A 2.4 GHz CMOS power amplifier using internal frequency doubling. - Ellie Cijvat; Niklas Troedsson; Henrik Sjöland (ISCAS (3), 2005)

An adaptive impedance tuning CMOS circuit for ISM 2.4-GHz band. - Peter Sjöblom; Henrik Sjöland (IEEE Trans. Circuits Syst. I Regul. Pap., 2005)

An all-digital Sigma-Delta-frequency discriminator of arbitrary order. - Essam Atalla; Emad Hegazi; Henrik Sjöland; M. Marzouk Ibrahim (ISCAS, 2006)

Measured CMOS Switched High-Quality Capacitors in a Reconfigurable Matching Network. - Peter Sjöblom; Henrik Sjöland (IEEE Trans. Circuits Syst. II Express Briefs, 2007)

A 25-GHz differential LC-VCO in 90-nm CMOS. - Markus Törmänen; Henrik Sjöland (APCCAS, 2008)

60 GHz 130-nm CMOS second harmonic power amplifiers. - Johan Wernehag; Henrik Sjöland (APCCAS, 2008)

A comparison of polar transmitter architectures using a GaN HEMT power amplifier. - Ellie Cijvat; Henrik Sjöland; Kevin Tom; Mike Faulkner (ICECS, 2008)

A Potential Transmitter Architecture for Future Generation Green Wireless Base Station. - Vandana Bassoo; Kevin Tom; Abdul Kader Mustafa; Ellie Cijvat; Henrik Sjöland; Mike Faulkner (EURASIP J. Wirel. Commun. Netw., 2009)

Third-order nonlinearity vs. load impedance for CMOS low-noise amplifiers. - Lars Aspemyr; Henrik Sjöland (Integr., 2009)

Comparative analysis of switching performance of transistors in SOS process for RF applications. - Robabeh Amirkhanzadeh; Henrik Sjöland; Ajay Tikka; Mike Faulkner (APCCAS, 2010)

A 24-GHz 90-nm CMOS beamforming receiver front-end with analog baseband phase rotation. - Andreas Axholt; Henrik Sjöland (ESSCIRC, 2010)

A 2.25mW inductor-less 24 GHz CML frequency divider in 90nm CMOS. - Andreas Axholt; Henrik Sjöland (ECCTD, 2011)

A 65nm CMOS 282μW 915MHz direct conversion receiver front-end. - Carl Bryant; Henrik Sjöland (ESSCIRC, 2011)

A 1.6-2.6GHz 29dBm injection-locked power amplifier with 64% peak PAE in 65nm CMOS. - Jonas Lindstrand; Carl Bryant; Markus Törmänen; Henrik Sjöland (ESSCIRC, 2011)

An analog (7, 5) convolutional decoder in 65 nm CMOS for low power wireless applications. - Reza Meraji; John B. Anderson; Henrik Sjöland; Viktor Öwall (ISCAS, 2011)

Design exploration of a 65 nm Sub-VT CMOS digital decimation filter chain. - S. M. Yasser Sherazi; Peter Nilsson 001; Omer Can Akgun; Henrik Sjöland; Joachim Neves Rodrigues (ISCAS, 2011)

Transistor sizing for a 4-state current mode analog channel decoder in 65-nm CMOS. - Reza Meraji; John B. Anderson; Henrik Sjöland; Viktor Öwall (NORCHIP, 2011)

A linearized 1.6-5 GHz low noise amplifier using positive feedback in 65 nm CMOS. - Anders Nejdel; Markus Törmänen; Henrik Sjöland (NORCHIP, 2011)

A 0.13µm CMOS ΔΣ PLL FM transmitter. - Ying Wu 003; Xiaodong Liu; Dawei Ye; Vijay Viswam; Lin Zhu; Ping Lu 002; Dejan Radjen; Henrik Sjöland (NORCHIP, 2011)

A CMOS 4.35-mW +22-dBm IIP3 Continuously Tunable Channel Select Filter for WLAN/WiMAX Receivers. - Mostafa Savadi Oskooei; Nasser Masoumi; Mahmoud Kamarei; Henrik Sjöland (IEEE J. Solid State Circuits, 2011)

A 100-fJ/cycle sub-VT decimation filter chain in 65 nm CMOS. - S. M. Yasser Sherazi; Peter Nilsson 001; Henrik Sjöland; Joachim Neves Rodrigues (ICECS, 2012)

A Receiver Architecture for Devices in Wireless Body Area Networks. - Henrik Sjöland; John B. Anderson; Carl Bryant; Rohit Chandra; Ove Edfors; Anders J. Johansson; Nafiseh Seyed Mazloum; Reza Meraji; Peter Nilsson 001; Dejan Radjen; Joachim Neves Rodrigues; S. M. Yasser Sherazi; et al. (IEEE J. Emerg. Sel. Topics Circuits Syst., 2012)

A 0.7 - 3.7 GHz six phase receiver front-end with third order harmonic rejection. - Anders Nejdel; Markus Törmänen; Henrik Sjöland (ESSCIRC, 2013)

Photodiodes in deep submicron CMOS process for fully integrated optical receivers. - Waqas Ahmad 001; Markus Törmänen; Henrik Sjöland (ESSDERC, 2013)

Performance evaluation of N-well/P-sub photodiodes in 65nm CMOS process. - Waqas Ahmad 001; Markus Törmänen; Henrik Sjöland (ICAIT, 2013)

A 3μW 500 kb/s ultra low power analog decoder with digital I/O in 65 nm CMOS. - Reza Meraji; John B. Anderson; Henrik Sjöland; Viktor Öwall (ICECS, 2013)

Analog and digital approaches for an energy efficient low complexity channel decoder. - Reza Meraji; S. M. Yasser Sherazi; John B. Anderson; Henrik Sjöland; Viktor Öwall (ISCAS, 2013)

An LC-based tunable low-isolation device for adaptive duplexers. - Mohammadreza Pourakbar; Markus Törmänen; Michael Faulkner; Henrik Sjöland (NORCHIP, 2013)

A 1V SiGe power amplifier for 81-86 GHz E-band. - Tobias Tired; Henrik Sjöland; Carl Bryant; Markus Törmänen (NORCHIP, 2013)

A 31.25/125MSps continuous-time ΔΣ ADC with 64/59db SNDR in 130nm CMOS. - Shubo Yan; Mattias Andersson; Henrik Sjöland (NORCHIP, 2013)

Ultra low energy design exploration of digital decimation filters in 65 nm dual-VT CMOS in the sub-VT domain. - S. M. Yasser Sherazi; Joachim Neves Rodrigues; Omer Can Akgun; Henrik Sjöland; Peter Nilsson 001 (Microprocess. Microsystems, 2013)

Wideband SAW-Less Receiver Front-End With Harmonic Rejection Mixer in 65-nm CMOS. - Imad ud Din; Johan Wernehag; Stefan Back Andersson; Sven Mattisson; Henrik Sjöland (IEEE Trans. Circuits Syst. II Express Briefs, 2013)

A 4th order Gm-C filter with 10MHz bandwidth and 39dBm IIP3 in 65nm CMOS. - Mohammed Abdulaziz; Markus Törmänen; Henrik Sjöland (ESSCIRC, 2014)

A 2.45GHz, 50uW wake-up receiver front-end with -88dBm sensitivity and 250kbps data rate. - Carl Bryant; Henrik Sjöland (ESSCIRC, 2014)

A low band cellular terminal antenna impedance tuner in 130nm CMOS-SOI technology. - Jonas Lindstrand; Ivaylo Vasilev; Henrik Sjöland (ESSCIRC, 2014)

Lessons from ten years of the international master's program in System-on-Chip. - Peter Nilsson 001; Pietro Andreani; Krzysztof Kuchcinski; Joachim Rodrigues; Henrik Sjöland; Markus Törmänen; Lars-Erik Wernersson; Viktor Öwall (EWME, 2014)

A digital baseband for low power FSK based receiver in 65 nm CMOS. - S. M. Yasser Sherazi; Henrik Sjöland; Peter Nilsson 001 (ICECS, 2014)

L-band 180° passive phase shifter employing auto-transformer in an SOS process. - Robabeh Amirkhanzadeh; Henrik Sjöland; Jean-Michel Redoute; Dan Nobbe; Mike Faulkner (ISCAS, 2014)

A 65 nm CMOS varactorless mm-wave VCO. - Therese Forsberg; Henrik Sjöland; Markus Törmänen (ISIC, 2014)

A 28 GHz SiGe QVCO with an I/Q phase error detector for an 81-86 GHz E-band transceiver. - Tobias Tired; Henrik Sjöland; Carl Bryant; Markus Törmänen (ISIC, 2014)

Ultra low power transceivers for wireless sensors and body area networks. - Henrik Sjöland; John B. Anderson; Carl Bryant; Rohit Chandra; Ove Edfors; Anders J. Johansson; Nafiseh Seyed Mazloum; Reza Meraji; Peter Nilsson 001; Dejan Radjen; Joachim Neves Rodrigues; S. M. Yasser Sherazi; et al. (ISMICT, 2014)

Fully integrated radio over fiber downlink for distributed multi-antenna systems in 65 nm CMOS. - Waqas Ahmad 001; Anders Nejdel; Markus Törmänen; Henrik Sjöland (NEWCAS, 2014)

A 28 GHz SiGe QVCO and divider for an 81-86 GHz E-band beam steering transmitter PLL. - Tobias Tired; Henrik Sjöland; Per Sandrup; Johan Wernehag; Imad ud Din; Markus Törmänen (NORCHIP, 2014)

Digitally assisted adaptive non-linearity suppression scheme for RF front ends. - Rakesh Gangarajaiah; Mohammed Abdulaziz; Liang Liu 002; Henrik Sjöland (PIMRC, 2014)

A 0.55 mW SAW-Less Receiver Front-End for Bluetooth Low Energy Applications. - Carl Bryant; Henrik Sjöland (IEEE J. Emerg. Sel. Topics Circuits Syst., 2014)

A Compensation Technique for Two-Stage Differential OTAs. - Mohammed Abdulaziz; Markus Törmänen; Henrik Sjöland (IEEE Trans. Circuits Syst. II Express Briefs, 2014)

Constant Mismatch Loss Boundary Circles and Their Application to Optimum State Distribution in Adaptive Matching Networks. - Peter Sjöblom; Henrik Sjöland (IEEE Trans. Circuits Syst. II Express Briefs, 2014)

A 0.6-3.0GHz 65nm CMOS radio receiver with ΔΣ-based A/D-converting channel-select filters. - Anders Nejdel; Xiaodong Liu; Mattias Palm; Lars Sundström; Markus Törmänen; Henrik Sjöland; Pietro Andreani (ESSCIRC, 2015)

CMOS adaptive TIA with embedded single-ended to differential conversion for analog optical links. - Waqas Ahmad 001; Mohammed Abdulaziz; Markus Törmänen; Henrik Sjöland (ISCAS, 2015)

A fully integrated 26 dBm linearized RF power amplifier in 65nm CMOS technology. - Waqas Ahmad 001; Leijun Xu; Markus Törmänen; Henrik Sjöland (ISCAS, 2015)

An ultra-low power charge-pump PLL with high temperature stability in 130 nm CMOS. - Anh Chu; Navneeta Deo; Waqas Ahmad 001; Markus Törmänen; Henrik Sjöland (NEWCAS, 2015)

A Noise-Cancelling Receiver Front-End With Frequency Selective Input Matching. - Anders Nejdel; Henrik Sjöland; Markus Törmänen (IEEE J. Solid State Circuits, 2015)

Low Power Analog and Digital (7, 5) Convolutional Decoders in 65 nm CMOS. - Reza Meraji; S. M. Yasser Sherazi; John B. Anderson; Henrik Sjöland; Viktor Öwall (IEEE Trans. Circuits Syst. I Regul. Pap., 2015)

Comparison of two SiGe 2-stage E-band power amplifier architectures. - Tobias Tired; Henrik Sjöland; Göran Jönsson; Johan Wernehag (APCCAS, 2016)

A 30dBm PA for MTC communication in 65nm CMOS technology. - Johan Wernehag; Waqas Ahmad 001; Henrik Sjöland; Olof Zander; Vanja Plicanic Samuelsson (LASCAS, 2016)

A 65 nm CMOS Wideband Radio Receiver With ΔΣ-Based A/D-Converting Channel-Select Filters. - Xiaodong Liu; Anders Nejdel; Mattias Palm; Lars Sundström; Markus Törmänen; Henrik Sjöland; Pietro Andreani (IEEE J. Solid State Circuits, 2016)

A Digitally Assisted Nonlinearity Mitigation System for Tunable Channel Select Filters. - Rakesh Gangarajaiah; Mohammed Abdulaziz; Henrik Sjöland; Peter Nilsson 001; Liang Liu 002 (IEEE Trans. Circuits Syst. II Express Briefs, 2016)

A 16-20 GHz LO system with 115 fs jitter for 24-30 GHz 5G in 28 nm FD-SOI CMOS. - Staffan Ek; Tony Påhlsson; Anders Carlsson; Andreas Axholt; Anna-Karin Stenman; Henrik Sjöland (ESSCIRC, 2017)

A Linearization Technique for Differential OTAs. - Mohammed Abdulaziz; Waqas Ahmad 001; Markus Törmänen; Henrik Sjöland (IEEE Trans. Circuits Syst. II Express Briefs, 2017)

Two Tunable Frequency Duplexer Architectures for Cellular Transceivers. - Imad ud Din; Johan Wernehag; Stefan Andersson; Henrik Sjöland (IEEE Trans. Circuits Syst. I Regul. Pap., 2017)

A 24GHz, 18dBm, Broadband, Three Stacked Power Amplifier in 28nm FDSOI. - Imad ud Din; Stefan Andersson; Therese Forsberg; Henrik Sjöland (NORCAS, 2018)

A 4.3-mW mm-Wave Divide-by-Two Circuit with 30% Locking Range in 28-nm FD-SOI CMOS. - Therese Forsberg; Johan Wernehag; Henrik Sjöland; Markus Törmänen (NORCAS, 2018)

A 28-nm FD-SOI 115-fs Jitter PLL-Based LO System for 24-30-GHz Sliding-IF 5G Transceivers. - Staffan Ek; Tony Påhlsson; Christian Elgaard; Anders Carlsson; Andreas Axholt; Anna-Karin Stenman; Lars Sundström; Henrik Sjöland (IEEE J. Solid State Circuits, 2018)

An 11 GHz-Bandwidth Variable Gain Ka-Band Power Amplifier for 5G Applications. - Reza Bagger; Henrik Sjöland (ESSCIRC, 2019)

A 65-nm CMOS Low-Power Front-End for 3rd Generation DNA Sequencing. - Yunus Dawji; Fredrik Zetterblom; Sergio Benages; Berta Morral; Siyu Tan; Henrik Sjöland; Sebastian Magierowski (IEEE SENSORS, 2019)

Low Power Receiver Front Ends: Scaling Laws and Applications. - Muris Sarajlic; Liang Liu 002; Henrik Sjöland; Ove Edfors (CoRR, 2019)

Improving Receiver Close-In Blocker Tolerance by Baseband Gm-C Notch Filtering. - Mohammed Abdulaziz; Eric A. M. Klumperink; Bram Nauta; Henrik Sjöland (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

Handling PA Nonlinearity in Massive MIMO: What are the Tradeoffs Between System Capacity and Power Consumption. - Sidra Muneer; Liang Liu 002; Ove Edfors; Henrik Sjöland; Liesbet Van der Perre (ACSSC, 2020)

Analysis and Design of an 1-20 GHz Track and Hold Circuit. - Peng Chen; Stefan Andersson; Sten E. Gunnarsson; Henrik Sjöland (ISCAS, 2021)

An LO Frequency Tripler with Phase Shifter and Detector in 28nm FD-SOI CMOS for 28-GHz Transceivers. - Rikard Gannedahl; Henrik Sjöland (NorCAS, 2021)

6G Wireless Systems: Vision, Requirements, Challenges, Insights, and Opportunities. - Harsh Tataria; Mansoor Shafi; Andreas F. Molisch; Mischa Dohler; Henrik Sjöland; Fredrik Tufvesson (Proc. IEEE, 2021)

Power Scaling Laws for Radio Receiver Front Ends. - Muris Sarajlic; Ashkan Sheikhi; Liang Liu 002; Henrik Sjöland; Ove Edfors (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

An 88% fractional bandwidth reconfigurable power amplifier for NB-IoT and LTE-M in 22 nm CMOS FDSOI. - Baktash Behmanesh; Joachim Rodrigues; Henrik Sjöland (NorCAS, 2022)

System Design and Performance for Antenna Reservation in Massive MIMO. - Sidra Muneer; Jesus Rodriguez Sanchez; Liesbet Van der Perre; Ove Edfors; Henrik Sjöland; Liang Liu 002 (VTC Fall, 2022)

A Modular System-level Testbench for 6G Beamforming Applications with Near Circuit-Level Fidelity. - Rikard Gannedahl; Javad Bagheri Asli; Henrik Sjöland; Atila Alvandpour (NEWCAS, 2023)

A mm-Wave Differential-to-Quadrature Frequency Tripler with Automatic Locking and Quadrature Correction. - Rikard Gannedahl; Henrik Sjöland (NorCAS, 2023)

Capacitive Cancellation in Compact Integrated Multi-GHz Differential Passive Baseband Filters. - Rikard Gannedahl; Henrik Sjöland (NewCAS, 2024)

Efficient Wideband mmW Transceiver Front End for 5G Base Stations in 22-nm FD-SOI CMOS. - Christian Elgaard; Mustafa Özen; Eric Westesson; Ahmed Mahmoud; Florent Torres; Shakila Bint Reyaz; Therese Forsberg; Rehman Akbar; Hans Hagberg; Henrik Sjöland (IEEE J. Solid State Circuits, 2024)

A Wideband Sub-6-GHz Transceiver Front End for 5G Base Stations in 22-nm FD-SOI CMOS. - Christian Elgaard; Mohammed Abdulaziz; Tony Påhlsson; Bengt Edholm; Florent Torres; Fabien Mesquita; Martin Hansson; Daniel Eckerbert; Stefan Back Andersson; Sven Mattisson; Henrik Sjöland (IEEE J. Solid State Circuits, 2025)