A practical substrate modeling algorithm with active guardband macromodel for mixed-signal substrate coupling verification. - Henry H. Y. Chan; Zeljko Zilic (ICECS, 2001)

Estimating Phase-Locked Loop Jitter due to Substrate Coupling: A Cyclostationary Approach. - Henry H. Y. Chan; Zeljko Zilic (ISQED, 2004)

Modeling Layout Effects for Sensitivity-Based Analog Circuit Optimization. - Henry H. Y. Chan; Zeljko Zilic (ISQED, 2005)

Modeling Simultaneous Switching Noise-Induced Jitter for System-on-Chip Phase-Locked Loops. - Henry H. Y. Chan; Zeljko Zilic (DAC, 2007)

A Performance Driven Layout Compaction Optimization Algorithm for Analog Circuits. - Henry H. Y. Chan; Zeljko Zilic (ISCAS, 2007)