A 802.15.3c/802.11ad compliant 24 Gb/s FFT processor for 60 GHz communication systems. - Henry Lopez Davila; Chun-Yi Liu 001; Wei-Chang Liu; Shen-Jui Huang; Shyh-Jye Jou; Sau-Gee Chen (SoCC, 2015)

An 8X-Parallelism Memory Access Reordering Polyphase Network for 60 GHz FBMC-OQAM Baseband Receiver. - Chun-Yi Liu 001; Meng-Siou Sie; Edmund Wen Jen Leong; Yu-Cheng Yao; Henry Lopez Davila; Chih-Wei Jen; Wei-Chang Liu; Shyh-Jye Jou (IEEE Trans. Circuits Syst. I Regul. Pap., 2016)

Residual sampling clocking offset estimation and compensation for FBMC-OQAM baseband receiver in the 60 GHz band. - Chun-Yi Liu 001; Yu-Cheng Yao; Meng-Siou Sie; Edmund Wen Jen Leong; Henry Lopez Davila; Chih-Wei Jen; Shyh-Jye Jou (ISCAS, 2017)

A MMSE Joint Feedback Feed-forward Equalizer for FBMC-OQAM Baseband Receiver in the 60 GHz Band. - Chun-Yi Liu 001; Edmund Wen Jen Leong; Chang-Ting Wu; Meng-Siou Sie; Henry Lopez Davila; Chih-Wei Jen; Shyh-Jye Jou (IEEE J. Emerg. Sel. Topics Circuits Syst., 2017)

Digital Self-Interference Cancellation for OFDM Full-Duplex Transmission in 60 GHz Band. - Chih-Wei Jen; Hung-Wei Yang; Hsun-Wei Chan; Hung-Chih Liu; Henry Lopez Davila; Chun-Yi Liu 001; Shyh-Jye Jou (ISCAS, 2018)

A Millimeter Wave Digital CMOS Baseband Transceiver for Wireless LAN Applications. - Kang-Lun Chiu; Hsun-Wei Chan; Wei-Che Lee; Chang-Ting Wu; Henry Lopez Davila; Hung-Chih Liu; Meng-Yuan Huang; Chun-Yi Liu 001; Tsai-Hua Lee; Hsin-Ting Chang; Chih-Wei Jen; Nien-Hsiang Chang; et al. (A-SSCC, 2019)

A 16/64 QAM Baseband SoC for mm-Wave Transceiver with Self-Healing for FD/FI IQ Mismatch, LO Leakage and CFO/SCO/PNC. - Hung-Chih Liu; Hsun-Wei Chan; Henry Lopez Davila; Kang-Lun Chiu; Chih-Wei Jen; Ngoc-Giang Doan; Zheng-Chun Huang; Hsin-Ting Chang; Nien-Hsiang Chang; Pei-Yun Tsai 001; Yen-Cheng Kuan; Shyh-Jye Jou (A-SSCC, 2020)

A 75-Gb/s/mm2 and Energy-Efficient LDPC Decoder Based on a Reduced Complexity Second Minimum Approximation Min-Sum Algorithm. - Henry Lopez Davila; Hsun-Wei Chan; Kang-Lun Chiu; Pei-Yun Tsai 001; Shyh-Jye Jou (IEEE Trans. Very Large Scale Integr. Syst., 2020)

Low Routing Complexity Multiframe Pipelined LDPC Decoder Based on a Novel Pseudo Marginalized Min-Sum Algorithm for High Throughput Applications. - Henry Lopez Davila; Tsung-Han Wu; Shyh-Jye Jou; Sau-Gee Chen; Pei-Yun Tsai 001 (IEEE Trans. Very Large Scale Integr. Syst., 2023)