Architecture and methodology of a SoPC with 3.25Gbps CDR based SERDES and 1Gbps dynamic phase alignment. - Ranianand Venkata; Wilson Wong; Tina Tran; Vinson Chan; Tim Hoang; Henry Lui; Uinh Ton; Sergey Shomurryev; Chong Lee; Shoujun Waiig; Huy Ngo; Malik Kdhani; et al. (CICC, 2003)