A Power-Efficient and Fast-Locking Digital Quadrature Clock Generator with Ping-Pong Phase Detection. - Heon Hwa Cheong; Suhwan Kim 001 (ISCAS, 2021)

A Fast-Locking All-Digital PLL With Triple-Stage Phase-Shifting. - Heon Hwa Cheong; Suhwan Kim 001 (IEEE Access, 2021)

A 19-bit Range and 4.5-ps Resolution Fully-Synthesizable Time-to-Digital Converter with Quad-Edge Offset Cancellation. - Heon Hwa Cheong; Suhwan Kim 001 (ISCAS, 2022)