VLSI architectures for computing the arithmetic Fourier transform. - Heonchul Park; V. K. Prasanna Kumar (ICASSP, 1991)

An architecture for tree search based vector quantization for single chip implementation. - Heonchul Park; Viktor K. Prasanna; Cho-Li Wang (ASAP, 1992)

A Class of Optimal VLSI Architectures for Computing Discrete Fourier Transform. - Heonchul Park; Viktor K. Prasanna (ICPP (3), 1992)

Area efficient VLSI architectures for Huffman coding. - Heonchul Park; Viktor K. Prasanna (ICASSP (1), 1993)

Fast Arithmetic on Reconfigurable Meshes. - Heonchul Park; Viktor K. Prasanna; Ju-wook Jang (ICPP (3), 1993)

An O(1) Time Optimal Algorithm for Multiplying Matrices on Reconfigurable Mesh. - Heonchul Park; Hyoung Joong Kim; Viktor K. Prasanna (Inf. Process. Lett., 1993)

Modular VLSI architectures for real-time full-search-based vector quantization. - Heonchul Park; Viktor K. Prasanna (IEEE Trans. Circuits Syst. Video Technol., 1993)

Modular VLSI architectures for computing the arithmetic Fourier transform. - Heonchul Park; Viktor K. Prasanna (IEEE Trans. Signal Process., 1993)

Synthesis of a class of data format converters with specified delays. - Jongwoo Bae; Viktor K. Prasanna; Heonchul Park (ASAP, 1994)

A Fast Algorithm for Performing Vector Quantization and its VLSI Implementation. - Heonchul Park; Viktor K. Prasanna (VLSI Design, 1994)

Area efficient fast Huffman decoder for multimedia applications. - Heonchul Park; Jae-Chul Son; Seong-Rae Cho (ICASSP, 1995)

A Fast Algorithm for Computing a Histogram on Reconfigurable Mesh. - Ju-wook Jang; Heonchul Park; Viktor K. Prasanna (IEEE Trans. Pattern Anal. Mach. Intell., 1995)

An Optimal Multiplication Algorithm on Reconfigurable Mesh. - Ju-wook Jang; Heonchul Park; Viktor K. Prasanna (IEEE Trans. Parallel Distributed Syst., 1997)